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authorTom Warren <twarren@nvidia.com>2012-05-15 14:38:03 -0700
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2012-07-07 14:07:17 +0200
commit046c76a6c0af77952a1ec5ab576d12f93ed52641 (patch)
treef1ffdc64146136f0bf8d44856ead393b9c062a91 /include/configs/seaboard.h
parent078078cfa91f72331421e6f7a46938a58a9b21a7 (diff)
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spi: Tegra2: Seaboard: enable SPI/UART corruption fix
Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'include/configs/seaboard.h')
-rw-r--r--include/configs/seaboard.h9
1 files changed, 9 insertions, 0 deletions
diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h
index 46d4228..889bdff 100644
--- a/include/configs/seaboard.h
+++ b/include/configs/seaboard.h
@@ -52,6 +52,15 @@
/* On Seaboard: GPIO_PI3 = Port I = 8, bit = 3 */
#define CONFIG_UART_DISABLE_GPIO GPIO_PI3
+/*
+ * On Seaboard, SPIFLASH is muxed with UART4. The next 5 defines are
+ * needed to work around that design error.
+ */
+#define CONFIG_SPI_UART_SWITCH
+#define CONFIG_SPI_CORRUPTS_UART NV_PA_APB_UARTD_BASE
+#define CONFIG_SPI_CORRUPTS_UART_NR 3
+#define CONFIG_SPI_CORRUPTS_UART_DLY 2500
+#undef CONFIG_CMDLINE_EDITING /* avoid NUL in input buffer */
#define CONFIG_MACH_TYPE MACH_TYPE_SEABOARD
#define CONFIG_SYS_BOARD_ODMDATA 0x300d8011 /* lp1, 1GB */