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| author | Ye.Li <B37916@freescale.com> | 2015-03-09 11:59:08 +0800 |
|---|---|---|
| committer | Peng Fan <Peng.Fan@freescale.com> | 2015-04-29 15:02:00 +0800 |
| commit | 6af24d6b2166b1e43c5339e21f14c22309743dec (patch) | |
| tree | b1c4c16ffe6a388b18ecb87a8b84be8a839ce941 /include/configs/mx7dsabresd.h | |
| parent | ce7798efc2b7a2d7cf458a2f5e3d263a73588b27 (diff) | |
| download | u-boot-imx-6af24d6b2166b1e43c5339e21f14c22309743dec.zip u-boot-imx-6af24d6b2166b1e43c5339e21f14c22309743dec.tar.gz u-boot-imx-6af24d6b2166b1e43c5339e21f14c22309743dec.tar.bz2 | |
MLK-10385-4 imx: mx7dsabresd: Add board codes for NAND flash support
Update board codes to support GPMI NAND flash. Since the GPMI NAND needs
board rework, it is disabled at default. Two ways to enable GPMI NAND:
1. Define CONFIG_SYS_BOOT_NAND for NAND boot case
2. Modify the line 306 in mx7dsabresd.h from QSPI to NAND.
#define CONFIG_SYS_USE_QSPI /* Enable the QSPI flash at default */
to
#define CONFIG_SYS_USE_NAND /* Enable the NAND flash at default */
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit 5db03facf3add6a95728bc97ac2300003a103932)
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Diffstat (limited to 'include/configs/mx7dsabresd.h')
| -rw-r--r-- | include/configs/mx7dsabresd.h | 81 |
1 files changed, 42 insertions, 39 deletions
diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h index 3986170..f5f2f1c 100644 --- a/include/configs/mx7dsabresd.h +++ b/include/configs/mx7dsabresd.h @@ -42,6 +42,11 @@ #define CONFIG_MXC_UART #define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 + #define CONFIG_CMD_FUSE #ifdef CONFIG_CMD_FUSE #define CONFIG_MXC_OCOTP @@ -59,13 +64,6 @@ #define CONFIG_DOS_PARTITION #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ -#define CONFIG_BAUDRATE 115200 - -#define CONFIG_SYS_FSL_USDHC_NUM 2 -#define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC1 */ -#define CONFIG_SYS_MMC_ENV_PART 0 /* user area */ -#define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */ - #define PHYS_SDRAM_SIZE SZ_1G #define CONFIG_CMD_PING @@ -85,34 +83,6 @@ /* ENET1 */ #define IMX_FEC_BASE ENET_IPS_BASE_ADDR -#ifdef CONFIG_SYS_BOOT_QSPI -#define CONFIG_SYS_USE_QSPI -#define CONFIG_ENV_IS_IN_SPI_FLASH -#elif defined CONFIG_SYS_BOOT_NAND -#define CONFIG_SYS_USE_NAND -#define CONFIG_ENV_IS_IN_NAND -#else -#define CONFIG_SYS_USE_QSPI /* Enable the QSPI flash at default */ -#define CONFIG_ENV_IS_IN_MMC -#endif - -#ifdef CONFIG_SYS_USE_NAND -#define CONFIG_CMD_NAND -#define CONFIG_CMD_NAND_TRIMFFS - -/* NAND stuff */ -#define CONFIG_NAND_MXS -#define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_BASE 0x40000000 -#define CONFIG_SYS_NAND_5_ADDR_CYCLE -#define CONFIG_SYS_NAND_ONFI_DETECTION - -/* DMA stuff, needed for GPMI/MXS NAND support */ -#define CONFIG_APBH_DMA -#define CONFIG_APBH_DMA_BURST -#define CONFIG_APBH_DMA_BURST8 -#endif - /* PMIC */ #define CONFIG_PFUZE3000_PMIC_I2C #ifdef CONFIG_PFUZE3000_PMIC_I2C @@ -127,10 +97,6 @@ #undef CONFIG_CMD_EXPORTENV #undef CONFIG_CMD_IMPORTENV -/* allow to overwrite serial and ethaddr */ -#define CONFIG_ENV_OVERWRITE -#define CONFIG_CONS_INDEX 1 - /* I2C configs */ #define CONFIG_CMD_I2C #define CONFIG_SYS_I2C @@ -330,6 +296,34 @@ #define CONFIG_ENV_SIZE SZ_8K +#ifdef CONFIG_SYS_BOOT_QSPI +#define CONFIG_SYS_USE_QSPI +#define CONFIG_ENV_IS_IN_SPI_FLASH +#elif defined CONFIG_SYS_BOOT_NAND +#define CONFIG_SYS_USE_NAND +#define CONFIG_ENV_IS_IN_NAND +#else +#define CONFIG_SYS_USE_QSPI /* Enable the QSPI flash at default */ +#define CONFIG_ENV_IS_IN_MMC +#endif + +#ifdef CONFIG_SYS_USE_NAND +#define CONFIG_CMD_NAND +#define CONFIG_CMD_NAND_TRIMFFS + +/* NAND stuff */ +#define CONFIG_NAND_MXS +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE 0x40000000 +#define CONFIG_SYS_NAND_5_ADDR_CYCLE +#define CONFIG_SYS_NAND_ONFI_DETECTION + +/* DMA stuff, needed for GPMI/MXS NAND support */ +#define CONFIG_APBH_DMA +#define CONFIG_APBH_DMA_BURST +#define CONFIG_APBH_DMA_BURST8 +#endif + #ifdef CONFIG_SYS_USE_QSPI #define CONFIG_FSL_QSPI /* enable the QUADSPI driver */ #define CONFIG_QSPI_BASE QSPI1_IPS_BASE_ADDR @@ -361,6 +355,15 @@ #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE #endif +#ifdef CONFIG_SYS_USE_NAND +#define CONFIG_SYS_FSL_USDHC_NUM 1 +#else +#define CONFIG_SYS_FSL_USDHC_NUM 2 +#endif +#define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC1 */ +#define CONFIG_SYS_MMC_ENV_PART 0 /* user area */ +#define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */ + #define CONFIG_OF_LIBFDT #define CONFIG_CMD_BOOTZ |