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| author | Peng Fan <peng.fan@nxp.com> | 2016-10-20 14:42:53 +0800 |
|---|---|---|
| committer | Robby Cai <robby.cai@nxp.com> | 2016-11-16 16:59:16 +0800 |
| commit | 6bf09b4eb88400154758b3f4eb944ca522da339e (patch) | |
| tree | 5235d43667061e729354bf521f4def2c843c73e4 /include/configs/mx6sx_arm2.h | |
| parent | 3e31cd4cf5407c7ab5e4533d0b77c83c97d850b9 (diff) | |
| download | u-boot-imx-6bf09b4eb88400154758b3f4eb944ca522da339e.zip u-boot-imx-6bf09b4eb88400154758b3f4eb944ca522da339e.tar.gz u-boot-imx-6bf09b4eb88400154758b3f4eb944ca522da339e.tar.bz2 | |
MLK-13373 mx6sll: update ddr script to 2.1.1
Update ddr script to 2.1.1
Script:
http://compass.freescale.net/livelink/livelink/235732623/EVK_IMX6SLL_LPDDR3_400MHz_512MB_32bit_V2.1.1.txt?func=doc.Fetch&nodeid=235732623
Version 2.1.1:
-Update [MMDC_MPRDDLCTL] and [MMDC_MPWRDLCTL] based on calibration results
-setmem /32 0x021B0848 = 0x3F393B3C // [MMDC_MPRDDLCTL] MMDC PHY Read delay-lines Configuration Register
-setmem /32 0x021B0850 = 0x262C3826 // [MMDC_MPWRDLCTL] MMDC PHY Write delay-lines Configuration Register
Tested on two boards.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit a3e5ebaa772e7ab1fe54615a47656b796cf5723e)
Diffstat (limited to 'include/configs/mx6sx_arm2.h')
0 files changed, 0 insertions, 0 deletions