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author | Ye Li <ye.li@nxp.com> | 2017-03-09 13:46:40 +0800 |
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committer | Ye Li <ye.li@nxp.com> | 2017-04-05 14:06:25 +0800 |
commit | c50a1156dae65677ae1bf1f2d4503abcdea9c514 (patch) | |
tree | 25986bb61678442d498f218929b49e070850925b /include/configs/mx6sll_arm2.h | |
parent | 5d1ac94da8eefb03a14de6b8cdc303cf581c22e6 (diff) | |
download | u-boot-imx-c50a1156dae65677ae1bf1f2d4503abcdea9c514.zip u-boot-imx-c50a1156dae65677ae1bf1f2d4503abcdea9c514.tar.gz u-boot-imx-c50a1156dae65677ae1bf1f2d4503abcdea9c514.tar.bz2 |
MLK-14390-1 mx6sllarm2: Add mx6sll LPDDR2/3 ARM2 board codes
Move the mx6sll lpddr2/3 arm2 board codes and defconfigs from v2016.03
as the base for converting to use DTB OF_CONTROL.
Signed-off-by: Ye Li <ye.li@nxp.com>
Diffstat (limited to 'include/configs/mx6sll_arm2.h')
-rw-r--r-- | include/configs/mx6sll_arm2.h | 268 |
1 files changed, 268 insertions, 0 deletions
diff --git a/include/configs/mx6sll_arm2.h b/include/configs/mx6sll_arm2.h new file mode 100644 index 0000000..9c5df2d --- /dev/null +++ b/include/configs/mx6sll_arm2.h @@ -0,0 +1,268 @@ +/* + * Copyright 2013-2016 Freescale Semiconductor, Inc. + * + * Configuration settings for the Freescale i.MX6SL EVK board. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include "mx6_common.h" + +#undef CONFIG_CMD_SET + +/* uncomment for PLUGIN mode support */ +/* #define CONFIG_USE_PLUGIN */ + +/* uncomment for SECURE mode support */ +/* #define CONFIG_SECURE_BOOT */ + +#ifdef CONFIG_SECURE_BOOT +#ifndef CONFIG_CSF_SIZE +#define CONFIG_CSF_SIZE 0x4000 +#endif +#endif + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M) + +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_BOARD_LATE_INIT + +#define CONFIG_MXC_UART +#define CONFIG_MXC_UART_BASE UART1_BASE + +/* MMC Configs */ +#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR +#define CONFIG_SYS_FSL_USDHC_NUM 3 +#define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC1 */ + +/* I2C Configs */ +#define CONFIG_CMD_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ +#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ +#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ +#define CONFIG_SYS_I2C_SPEED 100000 + +/* PMIC */ +#define CONFIG_POWER +#define CONFIG_POWER_I2C +#define CONFIG_POWER_PFUZE100 +#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 + +#define CONFIG_MFG_ENV_SETTINGS \ + "mfgtool_args=setenv bootargs console=${console},${baudrate} " \ + "rdinit=/linuxrc " \ + "g_mass_storage.stall=0 g_mass_storage.removable=1 " \ + "g_mass_storage.file=/fat g_mass_storage.ro=1 " \ + "g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\ + "g_mass_storage.iSerialNumber=\"\" "\ + "\0" \ + "initrd_addr=0x83800000\0" \ + "initrd_high=0xffffffff\0" \ + "bootcmd_mfg=run mfgtool_args;bootz ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \ + +#define CONFIG_EXTRA_ENV_SETTINGS \ + CONFIG_MFG_ENV_SETTINGS \ + "epdc_waveform=epdc_splash.bin\0" \ + "script=boot.scr\0" \ + "image=zImage\0" \ + "console=ttymxc0\0" \ + "fdt_high=0xffffffff\0" \ + "initrd_high=0xffffffff\0" \ + "fdt_file=imx6sll-lpddr3-arm2.dtb\0" \ + "fdt_addr=0x83000000\0" \ + "boot_fdt=try\0" \ + "ip_dyn=yes\0" \ + "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ + "mmcpart=1\0" \ + "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ + "mmcautodetect=yes\0" \ + "mmcargs=setenv bootargs console=${console},${baudrate} " \ + "root=${mmcroot}\0" \ + "loadbootscript=" \ + "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ + "bootscript=echo Running bootscript from mmc ...; " \ + "source\0" \ + "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ + "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ + "mmcboot=echo Booting from mmc ...; " \ + "run mmcargs; " \ + "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ + "if run loadfdt; then " \ + "bootz ${loadaddr} - ${fdt_addr}; " \ + "else " \ + "if test ${boot_fdt} = try; then " \ + "bootz; " \ + "else " \ + "echo WARN: Cannot load the DT; " \ + "fi; " \ + "fi; " \ + "else " \ + "bootz; " \ + "fi;\0" \ + "netargs=setenv bootargs console=${console},${baudrate} " \ + "root=/dev/nfs " \ + "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ + "netboot=echo Booting from net ...; " \ + "usb start; " \ + "run netargs; " \ + "if test ${ip_dyn} = yes; then " \ + "setenv get_cmd dhcp; " \ + "else " \ + "setenv get_cmd tftp; " \ + "fi; " \ + "${get_cmd} ${image}; " \ + "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ + "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ + "bootz ${loadaddr} - ${fdt_addr}; " \ + "else " \ + "if test ${boot_fdt} = try; then " \ + "bootz; " \ + "else " \ + "echo WARN: Cannot load the DT; " \ + "fi; " \ + "fi; " \ + "else " \ + "bootz; " \ + "fi;\0" + +#define CONFIG_BOOTCOMMAND \ + "mmc dev ${mmcdev};" \ + "mmc dev ${mmcdev}; if mmc rescan; then " \ + "if run loadbootscript; then " \ + "run bootscript; " \ + "else " \ + "if run loadimage; then " \ + "run mmcboot; " \ + "else run netboot; " \ + "fi; " \ + "fi; " \ + "else run netboot; fi" + +/* Miscellaneous configurable options */ +#define CONFIG_CMD_MEMTEST +#define CONFIG_SYS_MEMTEST_START 0x80000000 +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_128M) + +#define CONFIG_STACKSIZE SZ_128K + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR +#ifdef CONFIG_LPDDR2 +#define PHYS_SDRAM_SIZE SZ_1G +#else +#define PHYS_SDRAM_SIZE SZ_2G +#endif + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* Environment organization */ +#define CONFIG_ENV_SIZE SZ_8K +#define CONFIG_SYS_MMC_ENV_PART 0 /* user partition */ +#define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */ + +#ifdef CONFIG_SYS_BOOT_SPINOR +#define CONFIG_SYS_USE_SPINOR +#define CONFIG_ENV_IS_IN_SPI_FLASH +#else +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_VIDEO +#endif + +#if defined(CONFIG_ENV_IS_IN_MMC) +#define CONFIG_ENV_OFFSET (12 * SZ_64K) +#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) +#define CONFIG_ENV_OFFSET (768 * 1024) +#define CONFIG_ENV_SECT_SIZE (64 * 1024) +#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS +#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS +#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE +#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED +#endif + +/* Network */ +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP + +/* USB Configs */ +#define CONFIG_CMD_USB +#ifdef CONFIG_CMD_USB +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_MX6 +#define CONFIG_USB_STORAGE +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_ETHER_ASIX +#define CONFIG_USB_ETHER_RTL8152 +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 +#endif + +#define CONFIG_IMX_THERMAL + +#define CONFIG_IOMUX_LPSR + +#ifdef CONFIG_SYS_USE_SPINOR +#define CONFIG_CMD_SF +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_STMICRO +#define CONFIG_MXC_SPI +#define CONFIG_SF_DEFAULT_BUS 0 +#define CONFIG_SF_DEFAULT_SPEED 20000000 +#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) +#define CONFIG_SF_DEFAULT_CS 0 +#endif + +#ifdef CONFIG_VIDEO +#define CONFIG_CFB_CONSOLE +#define CONFIG_VIDEO_MXS +#define CONFIG_VIDEO_LOGO +#define CONFIG_VIDEO_SW_CURSOR +#define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_SPLASH_SCREEN +#define CONFIG_SPLASH_SCREEN_ALIGN +#define CONFIG_CMD_BMP +#define CONFIG_BMP_16BPP +#define CONFIG_VIDEO_BMP_RLE8 +#define CONFIG_VIDEO_BMP_LOGO +#define CONFIG_IMX_VIDEO_SKIP +#endif + + +/*#define CONFIG_MXC_EPDC 1*/ + +/* + * EPDC SPLASH SCREEN Configs + */ +#ifdef CONFIG_MXC_EPDC + /* + * Framebuffer and LCD + */ + #define CONFIG_SPLASH_SCREEN + #define CONFIG_CMD_BMP + #define CONFIG_LCD + #define CONFIG_SYS_CONSOLE_IS_IN_ENV +#ifdef CONFIG_MXC_EPDC + #undef LCD_TEST_PATTERN + #define LCD_BPP LCD_MONOCHROME + + #define CONFIG_WAVEFORM_BUF_SIZE 0x200000 +#endif +#endif /* CONFIG_SPLASH_SCREEN */ + +#endif /* __CONFIG_H */ |