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| author | Ye Li <ye.li@nxp.com> | 2016-03-15 11:05:06 +0800 |
|---|---|---|
| committer | Ye Li <ye.li@nxp.com> | 2017-04-05 14:04:41 +0800 |
| commit | b3b794bf382101fd82cfa12a5e717bd2cc6ca10a (patch) | |
| tree | 9b2d76acb3ee316381c29b0b3d39ce842554ee09 /include/configs/mx6qsabreauto.h | |
| parent | 2398e5ff576c6f0de86856f4b116315d0b34556b (diff) | |
| download | u-boot-imx-b3b794bf382101fd82cfa12a5e717bd2cc6ca10a.zip u-boot-imx-b3b794bf382101fd82cfa12a5e717bd2cc6ca10a.tar.gz u-boot-imx-b3b794bf382101fd82cfa12a5e717bd2cc6ca10a.tar.bz2 | |
MLK-12493-1 Add support for various boot device
Add support for various boot devices like NAND, QSPINOR, SPINOR,
eMMC, EIMNOR, SATA.
Modify board level files to support the feature and add corresponding defconfig files
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit 72c35e80b86f7f75a52db45959793882bb730793)
Diffstat (limited to 'include/configs/mx6qsabreauto.h')
| -rw-r--r-- | include/configs/mx6qsabreauto.h | 50 |
1 files changed, 5 insertions, 45 deletions
diff --git a/include/configs/mx6qsabreauto.h b/include/configs/mx6qsabreauto.h index 96f5a9d..e71fac1 100644 --- a/include/configs/mx6qsabreauto.h +++ b/include/configs/mx6qsabreauto.h @@ -20,7 +20,7 @@ #endif /*Since the pin conflicts on EIM D18, disable the USB host if the NOR flash is enabled */ -#if !defined(CONFIG_SYS_USE_SPINOR) && !defined(CONFIG_SYS_USE_EIMNOR) +#if !defined(CONFIG_CMD_SF) && !defined(CONFIG_MTD_NOR_FLASH) /* USB Configs */ #define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_MX6 @@ -35,63 +35,23 @@ #define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x30, 8}, {0x32, 8}, {0x34, 8} } #endif +#define CONFIG_CMD_NAND + #include "mx6sabre_common.h" #undef MFG_NAND_PARTITION -#ifdef CONFIG_SYS_BOOT_NAND +#ifdef CONFIG_NAND_BOOT #define MFG_NAND_PARTITION "mtdparts=8000000.nor:1m(boot),-(rootfs)\\\\;gpmi-nand:64m(boot),16m(kernel),16m(dtb),1m(misc),-(rootfs) " #else #define MFG_NAND_PARTITION "" #endif -#ifdef CONFIG_SYS_USE_EIMNOR -#define CONFIG_MTD_NOR_FLASH -#define CONFIG_SYS_FLASH_BASE WEIM_ARB_BASE_ADDR -#define CONFIG_SYS_FLASH_SECT_SIZE (128 * 1024) -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ -#define CONFIG_SYS_MAX_FLASH_SECT 256 /* max number of sectors on one chip */ -#define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */ -#define CONFIG_FLASH_CFI_DRIVER /* Use drivers/cfi_flash.c */ -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* Use buffered writes*/ -#define CONFIG_SYS_FLASH_EMPTY_INFO -#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT -#endif - #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_MMC_ENV_DEV 1 /* SDHC3 */ #define CONFIG_SYS_MMC_ENV_PART 0 /* user partition */ -#ifdef CONFIG_SYS_USE_SPINOR +#ifdef CONFIG_CMD_SF #define CONFIG_SF_DEFAULT_CS 1 #endif -/* I2C Configs */ -#define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_MXC -#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ -#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ -#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ -#define CONFIG_SYS_I2C_SPEED 100000 - -/* NAND flash command */ -#define CONFIG_CMD_NAND -#define CONFIG_CMD_NAND_TRIMFFS - -/* NAND stuff */ -#define CONFIG_NAND_MXS -#define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_BASE 0x40000000 -#define CONFIG_SYS_NAND_5_ADDR_CYCLE -#define CONFIG_SYS_NAND_ONFI_DETECTION - -/* DMA stuff, needed for GPMI/MXS NAND support */ -#define CONFIG_APBH_DMA -#define CONFIG_APBH_DMA_BURST -#define CONFIG_APBH_DMA_BURST8 - -/* PMIC */ -#define CONFIG_POWER -#define CONFIG_POWER_I2C -#define CONFIG_POWER_PFUZE100 -#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 #endif /* __MX6QSABREAUTO_CONFIG_H */ |