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author | Poonam Aggrwal <poonam.aggrwal@freescale.com> | 2011-02-07 17:17:28 +0530 |
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committer | Kumar Gala <galak@kernel.crashing.org> | 2011-04-04 09:24:42 -0500 |
commit | 66c74fca18aab4c4182be486641d7a374689c4c3 (patch) | |
tree | fe5db1cbbaf69695c37d8e783cfee0af67923b80 /include/configs/ml507.h | |
parent | 3313b20b950060723e6897870f793db7d3582084 (diff) | |
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powerpc/85xx: Optimized DDR settings for 800MT/s on P1/P2 RDB
Changed the following DDR timing parameters for 800Mt/s:
tRRT BL/2+1 to BL/2
tWWT BL/2+1 to BL/2
tWRT BL/2+1 to BL/2
tRWT BL/2+1 to BL/2
REFINT 6500ns to 7800ns
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'include/configs/ml507.h')
0 files changed, 0 insertions, 0 deletions