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authorAlexey Brodkin <Alexey.Brodkin@synopsys.com>2015-12-14 17:15:13 +0300
committerAlexey Brodkin <abrodkin@synopsys.com>2016-02-20 11:20:05 +0300
commitdb6ce2312dcae87619136457d1f9df56789f630a (patch)
tree1e894ccb3d9070f09d95a2930ea8dc3a67798ad3 /include/configs/dockstar.h
parent379b3280b30c4aad5ff0fdf1cd6431c5fa6861b1 (diff)
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arc: cache - utilize IO coherency (AKA IOC) engine
With release of ARC HS38 v2.1 new IO coherency engine could be built-in ARC core. This hardware module ensures coherency between DMA-ed data from peripherals and L2 cache. With L2 and IOC enabled there's no overhead for L2 cache manual maintenance which results in significantly improved IO bandwidth. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
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