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authorAubrey Li <aubrey.adi@gmail.com>2007-03-19 23:01:15 +0800
committerAubrey Li <aubrey.adi@gmail.com>2007-03-19 23:01:15 +0800
commita20e7106928a284a6d14c066c54b72e552075b06 (patch)
treee3dde666da99073732b97778e030d1beb0e75c09 /include/configs/PLU405.h
parenta6154fd1cfd020f6da8527e0365b1020a11a71d0 (diff)
parentcf3b41e0c1111dbb865b6e34e9f3c3d3145a6093 (diff)
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Merge http://www.denx.de/git/u-boot
Diffstat (limited to 'include/configs/PLU405.h')
-rw-r--r--include/configs/PLU405.h8
1 files changed, 2 insertions, 6 deletions
diff --git a/include/configs/PLU405.h b/include/configs/PLU405.h
index dd5d831..d02c39b 100644
--- a/include/configs/PLU405.h
+++ b/include/configs/PLU405.h
@@ -51,17 +51,13 @@
#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
-#if 0 /* test-only */
#define CONFIG_NET_MULTI 1
+#undef CONFIG_HAS_ETH1
#define CONFIG_MII 1 /* MII PHY management */
#define CONFIG_PHY_ADDR 0 /* PHY address */
-#define CONFIG_PHY1_ADDR 1 /* PHY address */
-#else
-#define CONFIG_MII 1 /* MII PHY management */
-#define CONFIG_PHY_ADDR 0 /* PHY address */
-#endif
#define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */
+#define CONFIG_RESET_PHY_R 1 /* use reset_phy() to disable phy sleep mode */
#define CONFIG_PHY_CLK_FREQ EMAC_STACR_CLK_66MHZ /* 66 MHz OPB clock*/