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authorKumar Gala <galak@kernel.crashing.org>2010-04-07 01:34:11 -0500
committerKumar Gala <galak@kernel.crashing.org>2010-04-07 01:34:39 -0500
commit933419096e857275b8b01f1ae577162231b143ff (patch)
tree10032cdd5dc6b0bd8f9e1e7ab6624beb3e245fae /include/configs/MPC8569MDS.h
parent5a4696088376fff82629e7e4a2444294dc589c96 (diff)
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ppc/85xx: Use CONFIG_NS16550_MIN_FUNCTIONS to reduce NAND_SPL size
The MPC8536DS_NAND SPL build was failing due to code size increase introduced by commit: commit 33f57bd553edf29dffef5a6c7d76e169c79a6049 Author: Kumar Gala <galak@kernel.crashing.org> Date: Fri Mar 26 15:14:43 2010 -0500 85xx: Fix enabling of L1 cache parity on secondary cores We built in some NS16550 functions that we dont need and can get rid of them via CONFIG_NS16550_MIN_FUNCTIONS. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'include/configs/MPC8569MDS.h')
-rw-r--r--include/configs/MPC8569MDS.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h
index 9b81703..0c43b2b 100644
--- a/include/configs/MPC8569MDS.h
+++ b/include/configs/MPC8569MDS.h
@@ -284,6 +284,9 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
+#ifdef CONFIG_NAND_SPL
+#define CONFIG_NS16550_MIN_FUNCTIONS
+#endif
#define CONFIG_SYS_BAUDRATE_TABLE \
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200}