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authorWolfgang Denk <wd@denx.de>2010-06-30 10:10:32 +0200
committerWolfgang Denk <wd@denx.de>2010-06-30 10:10:32 +0200
commit39ddd10b046fb791f47281ffb2100be01909ad72 (patch)
treecec01ecc6502a65cbbbda406dfac23b93c093899 /include/configs/DB64360.h
parent55357b7846237d12aa5f07aec657c5dbfaf790ed (diff)
parent0a9463e93537a68e7246714f43fb69eca0b7b214 (diff)
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Merge branch 'master' of ssh://gemini/home/wd/git/u-boot/master
Diffstat (limited to 'include/configs/DB64360.h')
-rw-r--r--include/configs/DB64360.h3
1 files changed, 1 insertions, 2 deletions
diff --git a/include/configs/DB64360.h b/include/configs/DB64360.h
index 160871b..910933a 100644
--- a/include/configs/DB64360.h
+++ b/include/configs/DB64360.h
@@ -318,8 +318,7 @@ ip=${ipaddr}:${serverip}${bootargs_end}; bootm 0x400000;\0"
#define CONFIG_SYS_HZ 1000 /* decr freq: 1ms ticks */
/*ronen - this the Sys clock (cpu bus,internal dram and SDRAM) */
-#define CONFIG_SYS_BUS_HZ 133000000 /* 133 MHz (CPU = 5*Bus = 666MHz) */
-#define CONFIG_SYS_BUS_CLK CONFIG_SYS_BUS_HZ
+#define CONFIG_SYS_BUS_CLK 133000000 /* 133 MHz (CPU = 5*Bus = 666MHz) */
#define CONFIG_SYS_DDR_SDRAM_CYCLE_COUNT_LOP 7 /* define the SDRAM cycle count */
#define CONFIG_SYS_DDR_SDRAM_CYCLE_COUNT_ROP 50 /* for 400MHZ -> 5.0 ns, for 133MHZ -> 7.50 ns */