From ee80fa7b6e96a43d4270700cddc884e00cdd99fd Mon Sep 17 00:00:00 2001
From: Wolfgang Denk <wd@denx.de>
Date: Sun, 13 Jun 2010 18:38:23 +0200
Subject: Get rid of bogus CONFIG_SYS_BUS_HZ and CONFIG_SYS_CONFIG_BUS_CLK
 definitions

CONFIG_SYS_BUS_HZ has not really been used anywhere except to be
redined as CONFIG_SYS_BUS_CLK; in addition, the mpc7448hpc2 had the
bogus CONFIG_SYS_CONFIG_BUS_CLK setting which duplicated the
funtionality.  Change all this to use CONFIG_SYS_BUS_CLK consistently.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Frank Gottschling <fgottschling@eltec.de>
Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
Cc: Eran Man <eran@nbase.co.il>
Cc: Stefan Roese <sr@denx.de>
Cc: Nye Liu <nyet@zumanetworks.com>
Cc: Roy Zang <tie-fei.zang@freescale.com>
---
 include/configs/DB64360.h | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

(limited to 'include/configs/DB64360.h')

diff --git a/include/configs/DB64360.h b/include/configs/DB64360.h
index 160871b..910933a 100644
--- a/include/configs/DB64360.h
+++ b/include/configs/DB64360.h
@@ -318,8 +318,7 @@ ip=${ipaddr}:${serverip}${bootargs_end}; bootm 0x400000;\0"
 
 #define CONFIG_SYS_HZ			1000		/* decr freq: 1ms ticks */
 /*ronen - this the Sys clock (cpu bus,internal dram and SDRAM) */
-#define CONFIG_SYS_BUS_HZ		133000000	/* 133 MHz (CPU = 5*Bus = 666MHz)		*/
-#define CONFIG_SYS_BUS_CLK		CONFIG_SYS_BUS_HZ
+#define CONFIG_SYS_BUS_CLK		133000000	/* 133 MHz (CPU = 5*Bus = 666MHz)		*/
 
 #define CONFIG_SYS_DDR_SDRAM_CYCLE_COUNT_LOP 7 /* define the SDRAM cycle count */
 #define CONFIG_SYS_DDR_SDRAM_CYCLE_COUNT_ROP 50 /* for 400MHZ -> 5.0 ns, for 133MHZ -> 7.50 ns */
-- 
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