summaryrefslogtreecommitdiff
path: root/include/configs/ATUM8548.h
diff options
context:
space:
mode:
authorKumar Gala <galak@kernel.crashing.org>2009-11-04 11:05:02 -0600
committerKumar Gala <galak@kernel.crashing.org>2010-01-05 13:49:06 -0600
commitfeadd5d53ba5047c3bc912ff5b7c7a690c8c53cf (patch)
treefa04faf8a773489d9c05a28a643b834c308b9708 /include/configs/ATUM8548.h
parent4681457e2aace8dff09dc4c6c02185231b970d6b (diff)
downloadu-boot-imx-feadd5d53ba5047c3bc912ff5b7c7a690c8c53cf.zip
u-boot-imx-feadd5d53ba5047c3bc912ff5b7c7a690c8c53cf.tar.gz
u-boot-imx-feadd5d53ba5047c3bc912ff5b7c7a690c8c53cf.tar.bz2
ppc/85xx: Clean up ATUM8548 PCI setup code
Use new fsl_pci_init_port() that reduces amount of duplicated code in the board ports, use IO accessors and clean up printing of status info. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'include/configs/ATUM8548.h')
-rw-r--r--include/configs/ATUM8548.h18
1 files changed, 9 insertions, 9 deletions
diff --git a/include/configs/ATUM8548.h b/include/configs/ATUM8548.h
index 91369a7..49a86fd 100644
--- a/include/configs/ATUM8548.h
+++ b/include/configs/ATUM8548.h
@@ -243,27 +243,27 @@
*/
#define CONFIG_SYS_PCI_PHYS 0x80000000 /* 1G PCI TLB */
-#define CONFIG_SYS_PCI1_MEM_BASE 0x80000000
-#define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BASE
+#define CONFIG_SYS_PCI1_MEM_BUS 0x80000000
+#define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BUS
#define CONFIG_SYS_PCI1_MEM_SIZE 0x20000000 /* 512M */
-#define CONFIG_SYS_PCI1_IO_BASE 0x00000000
+#define CONFIG_SYS_PCI1_IO_BUS 0x00000000
#define CONFIG_SYS_PCI1_IO_PHYS 0xe2000000
#define CONFIG_SYS_PCI1_IO_SIZE 0x00100000 /* 1M */
#ifdef CONFIG_PCI2
-#define CONFIG_SYS_PCI2_MEM_BASE 0xC0000000
-#define CONFIG_SYS_PCI2_MEM_PHYS CONFIG_SYS_PCI2_MEM_BASE
+#define CONFIG_SYS_PCI2_MEM_BUS 0xC0000000
+#define CONFIG_SYS_PCI2_MEM_PHYS CONFIG_SYS_PCI2_MEM_BUS
#define CONFIG_SYS_PCI2_MEM_SIZE 0x20000000 /* 512M */
-#define CONFIG_SYS_PCI2_IO_BASE 0x00000000
+#define CONFIG_SYS_PCI2_IO_BUS 0x00000000
#define CONFIG_SYS_PCI2_IO_PHYS 0xe2800000
#define CONFIG_SYS_PCI2_IO_SIZE 0x00100000 /* 1M */
#endif
#ifdef CONFIG_PCIE1
-#define CONFIG_SYS_PCIE1_MEM_BASE 0xa0000000
-#define CONFIG_SYS_PCIE1_MEM_PHYS CONFIG_SYS_PCIE1_MEM_BASE
+#define CONFIG_SYS_PCIE1_MEM_BUS 0xa0000000
+#define CONFIG_SYS_PCIE1_MEM_PHYS CONFIG_SYS_PCIE1_MEM_BUS
#define CONFIG_SYS_PCIE1_MEM_SIZE 0x20000000 /* 512M */
-#define CONFIG_SYS_PCIE1_IO_BASE 0x00000000
+#define CONFIG_SYS_PCIE1_IO_BUS 0x00000000
#define CONFIG_SYS_PCIE1_IO_PHYS 0xe3000000
#define CONFIG_SYS_PCIE1_IO_SIZE 0x00100000 /* 1M */
#endif