diff options
author | Jon Loeliger <jdl@freescale.com> | 2008-07-10 12:05:32 -0500 |
---|---|---|
committer | Jon Loeliger <jdl@freescale.com> | 2008-07-10 12:05:32 -0500 |
commit | 859f24350e6e4313626f85161dd03f025a4dac59 (patch) | |
tree | a025f68619045556e662326c8e1cbc147f9b633e /include/asm-ppc | |
parent | 3473ab737282b08ad61841fcbb14c4d264a93a8e (diff) | |
parent | e0320b1ebec13755911a53b0af12cbf3e5e49a65 (diff) | |
download | u-boot-imx-859f24350e6e4313626f85161dd03f025a4dac59.zip u-boot-imx-859f24350e6e4313626f85161dd03f025a4dac59.tar.gz u-boot-imx-859f24350e6e4313626f85161dd03f025a4dac59.tar.bz2 |
Merge commit 'wd/master'
Diffstat (limited to 'include/asm-ppc')
-rw-r--r-- | include/asm-ppc/bitops.h | 52 | ||||
-rw-r--r-- | include/asm-ppc/ppc4xx-sdram.h | 4 | ||||
-rw-r--r-- | include/asm-ppc/processor.h | 9 |
3 files changed, 62 insertions, 3 deletions
diff --git a/include/asm-ppc/bitops.h b/include/asm-ppc/bitops.h index 4e9c608..daa66cf 100644 --- a/include/asm-ppc/bitops.h +++ b/include/asm-ppc/bitops.h @@ -152,6 +152,7 @@ extern __inline__ int test_bit(int nr, __const__ volatile void *addr) } /* Return the bit position of the most significant 1 bit in a word */ +/* - the result is undefined when x == 0 */ extern __inline__ int __ilog2(unsigned int x) { int lz; @@ -167,6 +168,57 @@ extern __inline__ int ffz(unsigned int x) return __ilog2(x & -x); } +/* + * fls: find last (most-significant) bit set. + * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32. + * + * On powerpc, __ilog2(0) returns -1, but this is not safe in general + */ +static __inline__ int fls(unsigned int x) +{ + return __ilog2(x) + 1; +} + +/** + * fls64 - find last set bit in a 64-bit word + * @x: the word to search + * + * This is defined in a similar way as the libc and compiler builtin + * ffsll, but returns the position of the most significant set bit. + * + * fls64(value) returns 0 if value is 0 or the position of the last + * set bit if value is nonzero. The last (most significant) bit is + * at position 64. + */ +#if BITS_PER_LONG == 32 +static inline int fls64(__u64 x) +{ + __u32 h = x >> 32; + if (h) + return fls(h) + 32; + return fls(x); +} +#elif BITS_PER_LONG == 64 +static inline int fls64(__u64 x) +{ + if (x == 0) + return 0; + return __ilog2(x) + 1; +} +#else +#error BITS_PER_LONG not 32 or 64 +#endif + +static inline int __ilog2_u64(u64 n) +{ + return fls64(n) - 1; +} + +static inline int ffs64(u64 x) +{ + return __ilog2_u64(x & -x) + 1ull; +} + #ifdef __KERNEL__ /* diff --git a/include/asm-ppc/ppc4xx-sdram.h b/include/asm-ppc/ppc4xx-sdram.h index 83931f1..e151f0c 100644 --- a/include/asm-ppc/ppc4xx-sdram.h +++ b/include/asm-ppc/ppc4xx-sdram.h @@ -284,8 +284,8 @@ #if defined(CONFIG_440SPE) || \ defined(CONFIG_460EX) || defined(CONFIG_460GT) #define SDRAM_RXBAS_SDBA_MASK 0xFFE00000 /* Base address */ -#define SDRAM_RXBAS_SDBA_ENCODE(n) ((((u32)(n))&0xFFE00000)>>2) -#define SDRAM_RXBAS_SDBA_DECODE(n) ((((u32)(n))&0xFFE00000)<<2) +#define SDRAM_RXBAS_SDBA_ENCODE(n) ((u32)(((phys_size_t)(n) >> 2) & 0xFFE00000)) +#define SDRAM_RXBAS_SDBA_DECODE(n) ((((phys_size_t)(n)) & 0xFFE00000) << 2) #endif /* CONFIG_440SPE */ #if defined(CONFIG_440SP) #define SDRAM_RXBAS_SDBA_MASK 0xFF800000 /* Base address */ diff --git a/include/asm-ppc/processor.h b/include/asm-ppc/processor.h index 139e686..10fd478 100644 --- a/include/asm-ppc/processor.h +++ b/include/asm-ppc/processor.h @@ -968,10 +968,17 @@ struct cpu_type { u32 soc_ver; }; -struct cpu_type *identify_cpu(uint ver); +struct cpu_type *identify_cpu(u32 ver); +#if defined(CONFIG_MPC85xx) #define CPU_TYPE_ENTRY(n, v) \ { .name = #n, .soc_ver = SVR_##v, } +#else +#if defined(CONFIG_MPC83XX) +#define CPU_TYPE_ENTRY(x) {#x, SPR_##x} +#endif +#endif + #ifndef CONFIG_MACH_SPECIFIC extern int _machine; |