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| author | Haavard Skinnemoen <haavard.skinnemoen@atmel.com> | 2008-12-17 16:53:07 +0100 |
|---|---|---|
| committer | Haavard Skinnemoen <haavard.skinnemoen@atmel.com> | 2008-12-17 16:53:07 +0100 |
| commit | cb5473205206c7f14cbb1e747f28ec75b48826e2 (patch) | |
| tree | 8f4808d60917100b18a10b05230f7638a0a9bbcc /include/asm-ppc/cache.h | |
| parent | baf449fc5ff96f071bb0e3789fd3265f6d4fd9a0 (diff) | |
| parent | 92c78a3bbcb2ce508b4bf1c4a1e0940406a024bb (diff) | |
| download | u-boot-imx-cb5473205206c7f14cbb1e747f28ec75b48826e2.zip u-boot-imx-cb5473205206c7f14cbb1e747f28ec75b48826e2.tar.gz u-boot-imx-cb5473205206c7f14cbb1e747f28ec75b48826e2.tar.bz2 | |
Merge branch 'fixes' into cleanups
Conflicts:
board/atmel/atngw100/atngw100.c
board/atmel/atstk1000/atstk1000.c
cpu/at32ap/at32ap700x/gpio.c
include/asm-avr32/arch-at32ap700x/clk.h
include/configs/atngw100.h
include/configs/atstk1002.h
include/configs/atstk1003.h
include/configs/atstk1004.h
include/configs/atstk1006.h
include/configs/favr-32-ezkit.h
include/configs/hammerhead.h
include/configs/mimc200.h
Diffstat (limited to 'include/asm-ppc/cache.h')
| -rw-r--r-- | include/asm-ppc/cache.h | 13 |
1 files changed, 8 insertions, 5 deletions
diff --git a/include/asm-ppc/cache.h b/include/asm-ppc/cache.h index 9d9b971..53e8d05 100644 --- a/include/asm-ppc/cache.h +++ b/include/asm-ppc/cache.h @@ -12,6 +12,8 @@ #define L1_CACHE_SHIFT 4 #elif defined(CONFIG_PPC64BRIDGE) #define L1_CACHE_SHIFT 7 +#elif defined(CONFIG_E500MC) +#define L1_CACHE_SHIFT 6 #else #define L1_CACHE_SHIFT 5 #endif @@ -19,10 +21,10 @@ #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) /* - * For compatibility reasons support the CFG_CACHELINE_SIZE too + * For compatibility reasons support the CONFIG_SYS_CACHELINE_SIZE too */ -#ifndef CFG_CACHELINE_SIZE -#define CFG_CACHELINE_SIZE L1_CACHE_BYTES +#ifndef CONFIG_SYS_CACHELINE_SIZE +#define CONFIG_SYS_CACHELINE_SIZE L1_CACHE_BYTES #endif #define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1)) @@ -44,9 +46,10 @@ extern void clean_dcache_range(unsigned long start, unsigned long stop); extern void invalidate_dcache_range(unsigned long start, unsigned long stop); extern void flush_dcache(void); extern void invalidate_dcache(void); -#ifdef CFG_INIT_RAM_LOCK +extern void invalidate_icache(void); +#ifdef CONFIG_SYS_INIT_RAM_LOCK extern void unlock_ram_in_cache(void); -#endif /* CFG_INIT_RAM_LOCK */ +#endif /* CONFIG_SYS_INIT_RAM_LOCK */ #endif /* __ASSEMBLY__ */ /* prep registers for L2 */ |