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authorMike Frysinger <vapier@gentoo.org>2009-11-11 19:08:33 -0500
committerMike Frysinger <vapier@gentoo.org>2010-01-17 09:17:26 -0500
commitdc6bc645e0cc1939b31cc54346415cf8e0dffc88 (patch)
tree7f1e0ee52bbe5f793948921e4f1cead6e478c348 /include/asm-blackfin/mem_map.h
parentb7659ef2e764f62fc334f0d970721496823e4888 (diff)
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Blackfin: fix L1 Instruction sizes on BF52x/BF54x
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'include/asm-blackfin/mem_map.h')
-rw-r--r--include/asm-blackfin/mem_map.h26
1 files changed, 26 insertions, 0 deletions
diff --git a/include/asm-blackfin/mem_map.h b/include/asm-blackfin/mem_map.h
new file mode 100644
index 0000000..3e361d6
--- /dev/null
+++ b/include/asm-blackfin/mem_map.h
@@ -0,0 +1,26 @@
+/*
+ * Common Blackfin memory map
+ *
+ * Copyright 2004-2009 Analog Devices Inc.
+ * Licensed under the GPL-2 or later.
+ */
+
+#ifndef __BFIN_MEM_MAP_H__
+#define __BFIN_MEM_MAP_H__
+
+/* Every Blackfin so far has MMRs like this */
+#ifndef COREMMR_BASE
+# define COREMMR_BASE 0xFFE00000
+#endif
+#ifndef SYSMMR_BASE
+# define SYSMMR_BASE 0xFFC00000
+#endif
+
+/* Every Blackfin so far has on-chip Scratch Pad SRAM like this */
+#ifndef L1_SRAM_SCRATCH
+# define L1_SRAM_SCRATCH 0xFFB00000
+# define L1_SRAM_SCRATCH_SIZE 0x1000
+# define L1_SRAM_SCRATCH_END (L1_SRAM_SCRATCH + L1_SRAM_SCRATCH_SIZE)
+#endif
+
+#endif