From dc6bc645e0cc1939b31cc54346415cf8e0dffc88 Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Wed, 11 Nov 2009 19:08:33 -0500 Subject: Blackfin: fix L1 Instruction sizes on BF52x/BF54x Signed-off-by: Mike Frysinger --- include/asm-blackfin/mem_map.h | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) create mode 100644 include/asm-blackfin/mem_map.h (limited to 'include/asm-blackfin/mem_map.h') diff --git a/include/asm-blackfin/mem_map.h b/include/asm-blackfin/mem_map.h new file mode 100644 index 0000000..3e361d6 --- /dev/null +++ b/include/asm-blackfin/mem_map.h @@ -0,0 +1,26 @@ +/* + * Common Blackfin memory map + * + * Copyright 2004-2009 Analog Devices Inc. + * Licensed under the GPL-2 or later. + */ + +#ifndef __BFIN_MEM_MAP_H__ +#define __BFIN_MEM_MAP_H__ + +/* Every Blackfin so far has MMRs like this */ +#ifndef COREMMR_BASE +# define COREMMR_BASE 0xFFE00000 +#endif +#ifndef SYSMMR_BASE +# define SYSMMR_BASE 0xFFC00000 +#endif + +/* Every Blackfin so far has on-chip Scratch Pad SRAM like this */ +#ifndef L1_SRAM_SCRATCH +# define L1_SRAM_SCRATCH 0xFFB00000 +# define L1_SRAM_SCRATCH_SIZE 0x1000 +# define L1_SRAM_SCRATCH_END (L1_SRAM_SCRATCH + L1_SRAM_SCRATCH_SIZE) +#endif + +#endif -- cgit v1.1