summaryrefslogtreecommitdiff
path: root/include/asm-arm/arch-pxa
diff options
context:
space:
mode:
authorMarkus Klotzbuecher <mk@denx.de>2006-03-24 12:23:27 +0100
committerMarkus Klotzbücher <mk@pollux.denx.de>2006-03-24 12:23:27 +0100
commitba70d6a4170ebbec5513f01ceae66a200102ba9a (patch)
tree2a3031d73fc67445a3792c870720fe6ce3cffff3 /include/asm-arm/arch-pxa
parent552fc624f28d5db7b25f38c4e104fb7255d7df6b (diff)
downloadu-boot-imx-ba70d6a4170ebbec5513f01ceae66a200102ba9a.zip
u-boot-imx-ba70d6a4170ebbec5513f01ceae66a200102ba9a.tar.gz
u-boot-imx-ba70d6a4170ebbec5513f01ceae66a200102ba9a.tar.bz2
delta board: DA9030 initialization and i2c support. Some minor changes to
make the pxa i2c driver work with the monahans cpu.
Diffstat (limited to 'include/asm-arm/arch-pxa')
-rw-r--r--include/asm-arm/arch-pxa/pxa-regs.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h
index a92a450..ebda719 100644
--- a/include/asm-arm/arch-pxa/pxa-regs.h
+++ b/include/asm-arm/arch-pxa/pxa-regs.h
@@ -475,11 +475,11 @@ typedef void (*ExcpHndlr) (void) ;
#define ICR_ACKNAK 0x4 /* send ACK(0) or NAK(1) */
#define ICR_TB 0x8 /* transfer byte bit */
#define ICR_MA 0x10 /* master abort */
-#define ICR_SCLE 0x20 /* master clock enable */
+#define ICR_SCLE 0x20 /* master clock enable, mona SCLEA */
#define ICR_IUE 0x40 /* unit enable */
#define ICR_GCD 0x80 /* general call disable */
#define ICR_ITEIE 0x100 /* enable tx interrupts */
-#define ICR_IRFIE 0x200 /* enable rx interrupts */
+#define ICR_IRFIE 0x200 /* enable rx interrupts, mona: DRFIE */
#define ICR_BEIE 0x400 /* enable bus error ints */
#define ICR_SSDIE 0x800 /* slave STOP detected int enable */
#define ICR_ALDIE 0x1000 /* enable arbitration interrupt */
@@ -923,7 +923,7 @@ typedef void (*ExcpHndlr) (void) ;
#define ICHP __REG(0x40D00018) /* Interrupt Controller Highest Priority Register */
/* Missing: 32 Interrupt priority registers
* These are the same as beneath for PXA27x: maybe can be merged if
- * GPIO Stuff is same too.
+ * GPIO Stuff is same too.
*/
#define ICIP2 __REG(0x40D0009C) /* Interrupt Controller IRQ Pending Register 2 */
#define ICMR2 __REG(0x40D000A0) /* Interrupt Controller Mask Register 2 */