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| author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-08-10 16:08:40 +0900 |
|---|---|---|
| committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-08-11 17:49:14 +0900 |
| commit | 82d075e79fa509ffb8ecd8dd2dc216929d6e8289 (patch) | |
| tree | 0c503edf511c583c91d3fd2acacc6bd85ee76187 /examples/Makefile | |
| parent | 0efbbc5c613b28614eb3323145b5d3eda4a33188 (diff) | |
| download | u-boot-imx-82d075e79fa509ffb8ecd8dd2dc216929d6e8289.zip u-boot-imx-82d075e79fa509ffb8ecd8dd2dc216929d6e8289.tar.gz u-boot-imx-82d075e79fa509ffb8ecd8dd2dc216929d6e8289.tar.bz2 | |
ARM: uniphier: fix ROM boot mode for PH1-sLD3
Commit 4b50369fb535 ("ARM: uniphier: create early page table at
run-time") broke the ROM boot mode for PH1-sLD3 SoC, because the
run-time page table creation requires the outer cache register
access but the page table in the sLD3 Boot ROM does not straight-map
virtual/physical addresses.
The idea here is to check the current page table to determine if
it is a straight map table. If not, adjust the outer cache register
base.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'examples/Makefile')
0 files changed, 0 insertions, 0 deletions