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authorTom Rini <trini@konsulko.com>2017-02-01 06:57:35 -0500
committerTom Rini <trini@konsulko.com>2017-02-01 06:57:35 -0500
commitf77309d34325369dbdf0bf62387c9e974f1b37da (patch)
treee78043de1b4f3659f755074887fbc52ba95fc0a2 /drivers
parentdd3b64eb56dae10016bd314e59a650da511c1a4e (diff)
parenta1b6b0a9c1f91756b93e6d804837dc178d79d39e (diff)
downloadu-boot-imx-f77309d34325369dbdf0bf62387c9e974f1b37da.zip
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Merge git://www.denx.de/git/u-boot-marvell
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/phy/marvell.c54
-rw-r--r--drivers/pci/pci_mvebu.c25
-rw-r--r--drivers/phy/marvell/comphy_a3700.c7
-rw-r--r--drivers/tpm/Kconfig6
4 files changed, 76 insertions, 16 deletions
diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c
index 4eeb0f6..c3058a4 100644
--- a/drivers/net/phy/marvell.c
+++ b/drivers/net/phy/marvell.c
@@ -480,6 +480,49 @@ static int m88e1310_config(struct phy_device *phydev)
return genphy_config_aneg(phydev);
}
+static int m88e1680_config(struct phy_device *phydev)
+{
+ /*
+ * As per Marvell Release Notes - Alaska V 88E1680 Rev A2
+ * Errata Section 4.1
+ */
+ u16 reg;
+ int res;
+
+ /* Matrix LED mode (not neede if single LED mode is used */
+ phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1118_PHY_PAGE, 0x0004);
+ reg = phy_read(phydev, MDIO_DEVAD_NONE, 27);
+ reg |= (1 << 5);
+ phy_write(phydev, MDIO_DEVAD_NONE, 27, reg);
+
+ /* QSGMII TX amplitude change */
+ phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1118_PHY_PAGE, 0x00fd);
+ phy_write(phydev, MDIO_DEVAD_NONE, 8, 0x0b53);
+ phy_write(phydev, MDIO_DEVAD_NONE, 7, 0x200d);
+ phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1118_PHY_PAGE, 0x0000);
+
+ /* EEE initialization */
+ phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1118_PHY_PAGE, 0x00ff);
+ phy_write(phydev, MDIO_DEVAD_NONE, 17, 0xb030);
+ phy_write(phydev, MDIO_DEVAD_NONE, 16, 0x215c);
+ phy_write(phydev, MDIO_DEVAD_NONE, 22, 0x00fc);
+ phy_write(phydev, MDIO_DEVAD_NONE, 24, 0x888c);
+ phy_write(phydev, MDIO_DEVAD_NONE, 25, 0x888c);
+ phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1118_PHY_PAGE, 0x0000);
+ phy_write(phydev, MDIO_DEVAD_NONE, 0, 0x9140);
+
+ res = genphy_config_aneg(phydev);
+ if (res < 0)
+ return res;
+
+ /* soft reset */
+ reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
+ reg |= BMCR_RESET;
+ phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, reg);
+
+ return 0;
+}
+
static struct phy_driver M88E1011S_driver = {
.name = "Marvell 88E1011S",
.uid = 0x1410c60,
@@ -580,6 +623,16 @@ static struct phy_driver M88E1310_driver = {
.shutdown = &genphy_shutdown,
};
+static struct phy_driver M88E1680_driver = {
+ .name = "Marvell 88E1680",
+ .uid = 0x1410ed0,
+ .mask = 0xffffff0,
+ .features = PHY_GBIT_FEATURES,
+ .config = &m88e1680_config,
+ .startup = &genphy_startup,
+ .shutdown = &genphy_shutdown,
+};
+
int phy_marvell_init(void)
{
phy_register(&M88E1310_driver);
@@ -592,6 +645,7 @@ int phy_marvell_init(void)
phy_register(&M88E1011S_driver);
phy_register(&M88E1510_driver);
phy_register(&M88E1518_driver);
+ phy_register(&M88E1680_driver);
return 0;
}
diff --git a/drivers/pci/pci_mvebu.c b/drivers/pci/pci_mvebu.c
index 0f44970..da0aa29 100644
--- a/drivers/pci/pci_mvebu.c
+++ b/drivers/pci/pci_mvebu.c
@@ -91,25 +91,26 @@ static void __iomem *mvebu_pcie_membase = (void __iomem *)MBUS_PCI_MEM_BASE;
#if defined(CONFIG_ARMADA_38X)
#define PCIE_BASE(if) \
((if) == 0 ? \
- MVEBU_REG_PCIE_BASE + 0x40000 : \
- MVEBU_REG_PCIE_BASE + 0x4000 * (if))
+ MVEBU_REG_PCIE0_BASE : \
+ (MVEBU_REG_PCIE_BASE + 0x4000 * (if - 1)))
/*
* On A38x MV6820 these PEX ports are supported:
* 0 - Port 0.0
- * 1 - Port 0.1
- * 2 - Port 0.2
+ * 1 - Port 1.0
+ * 2 - Port 2.0
+ * 3 - Port 3.0
*/
-#define MAX_PEX 3
+#define MAX_PEX 4
static struct mvebu_pcie pcie_bus[MAX_PEX];
static void mvebu_get_port_lane(struct mvebu_pcie *pcie, int pex_idx,
int *mem_target, int *mem_attr)
{
- u8 port[] = { 0, 1, 2 };
- u8 lane[] = { 0, 0, 0 };
- u8 target[] = { 8, 4, 4 };
- u8 attr[] = { 0xe8, 0xe8, 0xd8 };
+ u8 port[] = { 0, 1, 2, 3 };
+ u8 lane[] = { 0, 0, 0, 0 };
+ u8 target[] = { 8, 4, 4, 4 };
+ u8 attr[] = { 0xe8, 0xe8, 0xd8, 0xb8 };
pcie->port = port[pex_idx];
pcie->lane = lane[pex_idx];
@@ -351,9 +352,9 @@ void pci_init_board(void)
mvebu_get_port_lane(pcie, i, &mem_target, &mem_attr);
/* Don't read at all from pci registers if port power is down */
- if (pcie->lane == 0 && SELECT(soc_ctrl, pcie->port) == 0) {
- i += 3;
- debug("%s: skipping port %d\n", __func__, pcie->port);
+ if (SELECT(soc_ctrl, pcie->port) == 0) {
+ if (pcie->lane == 0)
+ debug("%s: skipping port %d\n", __func__, pcie->port);
continue;
}
diff --git a/drivers/phy/marvell/comphy_a3700.c b/drivers/phy/marvell/comphy_a3700.c
index faa62f9..5afd23c 100644
--- a/drivers/phy/marvell/comphy_a3700.c
+++ b/drivers/phy/marvell/comphy_a3700.c
@@ -884,11 +884,10 @@ void comphy_dedicated_phys_init(void)
}
node = fdt_node_offset_by_compatible(blob, -1,
- "marvell,armada-3700-sdio");
+ "marvell,armada-8k-sdhci");
if (node <= 0) {
- debug("No SDIO node in DT, looking for MMC one\n");
- node = fdt_node_offset_by_compatible(blob, -1,
- "marvell,xenon-sdhci");
+ node = fdt_node_offset_by_compatible(
+ blob, -1, "marvell,armada-3700-sdhci");
}
if (node > 0) {
diff --git a/drivers/tpm/Kconfig b/drivers/tpm/Kconfig
index 7ab34ce..3490ee0 100644
--- a/drivers/tpm/Kconfig
+++ b/drivers/tpm/Kconfig
@@ -82,4 +82,10 @@ config TPM_ST33ZP24_SPI
to the device using the standard TPM Interface Specification (TIS)
protocol
+config TPM_FLUSH_RESOURCES
+ bool "Enable TPM resource flushing support"
+ depends on TPM
+ help
+ Enable support to flush specific resources (e.g. keys) from the TPM.
+ The functionality is available via the 'tpm' command as well.
endmenu