Merge branch 'master' of git://git.denx.de/u-boot-nds32

4 files changed, 8 insertions, 86 deletions

diff --git a/drivers/block/ftide020.c b/drivers/block/ftide020.c
index 0b7c129..1f6995e 100644
--- a/drivers/block/ftide020.c
+++ b/drivers/block/ftide020.c
@@ -64,7 +64,7 @@ void ide_write_register(int dev, unsigned int port, unsigned char val)
 		IDE_REG_DA_WRITE(port) | val);
 }
 
-void ide_write_data(int dev, ulong *sect_buf, int words)
+void ide_write_data(int dev, const ulong *sect_buf, int words)
 {
 	static struct ftide020_s *ftide020 = (struct ftide020_s *) FTIDE_BASE;
 
diff --git a/drivers/mmc/ftsdc010_mci.c b/drivers/mmc/ftsdc010_mci.c
index f7b54b2..7600d5c 100644
--- a/drivers/mmc/ftsdc010_mci.c
+++ b/drivers/mmc/ftsdc010_mci.c
@@ -174,7 +174,11 @@ static int ftsdc010_request(struct mmc *mmc, struct mmc_cmd *cmd,
 		len = data->blocksize * data->blocks;
 
 		/* 1. data disable + fifo reset */
-		writel(FTSDC010_DCR_FIFO_RST, &regs->dcr);
+		dcr = 0;
+#ifdef CONFIG_FTSDC010_SDIO
+		dcr |= FTSDC010_DCR_FIFO_RST;
+#endif
+		writel(dcr, &regs->dcr);
 
 		/* 2. clear status register */
 		writel(FTSDC010_STATUS_DATA_MASK | FTSDC010_STATUS_FIFO_URUN
diff --git a/drivers/pci/pci_ftpci100.c b/drivers/pci/pci_ftpci100.c
index 8ce2569..5ee8b6b 100644
--- a/drivers/pci/pci_ftpci100.c
+++ b/drivers/pci/pci_ftpci100.c
@@ -11,11 +11,11 @@
 #include <malloc.h>
 #include <pci.h>
 
+#include <faraday/ftpci100.h>
+
 #include <asm/io.h>
 #include <asm/types.h> /* u32, u16.... used by pci.h */
 
-#include "pci_ftpci100.h"
-
 struct ftpci100_data {
 	unsigned int reg_base;
 	unsigned int io_base;
diff --git a/drivers/pci/pci_ftpci100.h b/drivers/pci/pci_ftpci100.h
deleted file mode 100644
index 73eb7c5..0000000
--- a/drivers/pci/pci_ftpci100.h
+++ /dev/null
@@ -1,82 +0,0 @@
-/*
- * Faraday FTPCI100 PCI Bridge Controller Device Driver Implementation
- *
- * Copyright (C) 2010 Andes Technology Corporation
- * Gavin Guo, Andes Technology Corporation <gavinguo@andestech.com>
- * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef __FTPCI100_H
-#define __FTPCI100_H
-
-/* AHB Control Registers */
-struct ftpci100_ahbc {
-	unsigned int iosize;		/* 0x00 - I/O Space Size Signal */
-	unsigned int prot;		/* 0x04 - AHB Protection */
-	unsigned int rsved[8];		/* 0x08-0x24 - Reserved */
-	unsigned int conf;		/* 0x28 - PCI Configuration */
-	unsigned int data;		/* 0x2c - PCI Configuration DATA */
-};
-
-/*
- * FTPCI100_IOSIZE_REG's constant definitions
- */
-#define FTPCI100_BASE_IO_SIZE(x)	(ffs(x) - 1)	/* 1M - 2048M */
-
-/*
- * PCI Configuration Register
- */
-#define PCI_INT_MASK			0x4c
-#define PCI_MEM_BASE_SIZE1		0x50
-#define PCI_MEM_BASE_SIZE2		0x54
-#define PCI_MEM_BASE_SIZE3		0x58
-
-/*
- * PCI_INT_MASK's bit definitions
- */
-#define PCI_INTA_ENABLE			(1 << 22)
-#define PCI_INTB_ENABLE			(1 << 23)
-#define PCI_INTC_ENABLE			(1 << 24)
-#define PCI_INTD_ENABLE			(1 << 25)
-
-/*
- * PCI_MEM_BASE_SIZE1's constant definitions
- */
-#define FTPCI100_BASE_ADR_SIZE(x)	((ffs(x) - 1) << 16)	/* 1M - 2048M */
-
-#define FTPCI100_MAX_FUNCTIONS		20
-#define PCI_IRQ_LINES			4
-
-#define MAX_BUS_NUM			256
-#define MAX_DEV_NUM			32
-#define MAX_FUN_NUM			8
-
-#define PCI_MAX_BAR_PER_FUNC		6
-
-/*
- * PCI_MEM_SIZE
- */
-#define FTPCI100_MEM_SIZE(x)		(ffs(x) << 24)
-
-/* This definition is used by pci_ftpci_init() */
-#define FTPCI100_BRIDGE_VENDORID		0x159b
-#define FTPCI100_BRIDGE_DEVICEID		0x4321
-
-struct pcibar {
-	unsigned int size;
-	unsigned int addr;
-};
-
-struct pci_config {
-	unsigned int bus;
-	unsigned int dev;				/* device */
-	unsigned int func;
-	unsigned int pin;
-	unsigned short v_id;				/* vendor id */
-	unsigned short d_id;				/* device id */
-	struct pcibar bar[PCI_MAX_BAR_PER_FUNC + 1];
-};
-
-#endif