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| author | Stefan Roese <sr@denx.de> | 2015-08-11 17:08:01 +0200 |
|---|---|---|
| committer | Luka Perkov <luka.perkov@sartura.hr> | 2015-08-17 18:41:33 +0200 |
| commit | a3ed9789e73c2de1b0c1d52b9c0d2674147f3b9a (patch) | |
| tree | dff751fd335e94c0378ae8496bc62d3484d51e4d /drivers | |
| parent | 8822fe1683f2fbe18e1f99e99f0e09bde291481e (diff) | |
| download | u-boot-imx-a3ed9789e73c2de1b0c1d52b9c0d2674147f3b9a.zip u-boot-imx-a3ed9789e73c2de1b0c1d52b9c0d2674147f3b9a.tar.gz u-boot-imx-a3ed9789e73c2de1b0c1d52b9c0d2674147f3b9a.tar.bz2 | |
arm: mvebu: sdram: Enable ECC support on Armada XP
This is tested on the DB-MV784MP-GP eval board. To really enable ECC
support on this board the I2C EEPROM needs to get changed. As it
saves the enabling of ECC support internally. For this the following
commands can be used to enable ECC support on this board:
Its recommended for first save (print) the value(s) in this EEPROM
address:
=> i2c md 4e 0.1 2
0000: 05 00 ..
To enable ECC support you need to set bit 1 in the 2nd byte:
Marvell>> i2c mw 4e 1.1 02
Marvell>> i2c md 4e 0.1 2
0000: 05 02 ..
To disable ECC support again, please use this command:
Marvell>> i2c mw 4e 1.1 00
Marvell>> i2c md 4e 0.1 2
0000: 05 00 ..
On other AXP boards, simply plugging an ECC DIMM should be enough to
enable ECC support.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/ddr/marvell/axp/ddr3_axp_config.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/ddr/marvell/axp/ddr3_axp_config.h b/drivers/ddr/marvell/axp/ddr3_axp_config.h index 800d2d1..a672044 100644 --- a/drivers/ddr/marvell/axp/ddr3_axp_config.h +++ b/drivers/ddr/marvell/axp/ddr3_axp_config.h @@ -44,7 +44,7 @@ * DDR3_TRAINING_DEBUG - Debug prints of internal code */ #define DDR_TARGET_FABRIC 5 -#define DRAM_ECC 0 +#define DRAM_ECC 1 #ifdef MV_DDR_32BIT #define BUS_WIDTH 32 |