summaryrefslogtreecommitdiff
path: root/drivers
diff options
context:
space:
mode:
authorPeng Fan <peng.fan@nxp.com>2015-12-30 17:04:16 +0800
committerguoyin.chen <guoyin.chen@freescale.com>2016-03-04 15:35:52 +0800
commita17c369ea9966f03f09e30cf806b4029e3a09766 (patch)
tree3cd3b3ab90bb7735430b67725e6a2c8a326405eb /drivers
parent43488f288a5a4ec0c632c229cad088099842a3a9 (diff)
downloadu-boot-imx-a17c369ea9966f03f09e30cf806b4029e3a09766.zip
u-boot-imx-a17c369ea9966f03f09e30cf806b4029e3a09766.tar.gz
u-boot-imx-a17c369ea9966f03f09e30cf806b4029e3a09766.tar.bz2
MLK-12102 mmc: fsl: introduce wp_enable
Introudce wp_enable. If want to check WPSPL, then in board code, need to set wp_enable to 1. Take i.MX6UL for example, to some boards, they do not use WP singal, so they does not configure USDHC1_WP_SELECT_INPUT, and its default value is 0(GPIO1_IO02). However GPIO1_IO02 is muxed for i2c usage and SION bit set. So USDHC controller can always get wp signal and WPSPL shows write protect and blocks driver continuing. This is not what we want to see, so add wp_enable, and if set to 0, just omit the WPSPL checking and this does not effect normal working of usdhc controller. Suggested-by: Ye.Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/mmc/fsl_esdhc.c9
1 files changed, 6 insertions, 3 deletions
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index 7d002b5..e1fbb33 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -212,9 +212,12 @@ static int esdhc_setup_data(struct mmc *mmc, struct mmc_data *data)
#endif
if (wml_value > WML_WR_WML_MAX)
wml_value = WML_WR_WML_MAX_VAL;
- if ((esdhc_read32(&regs->prsstat) & PRSSTAT_WPSPL) == 0) {
- printf("\nThe SD card is locked. Can not write to a locked card.\n\n");
- return TIMEOUT;
+
+ if (cfg->wp_enable) {
+ if ((esdhc_read32(&regs->prsstat) & PRSSTAT_WPSPL) == 0) {
+ printf("\nThe SD card is locked. Can not write to a locked card.\n\n");
+ return TIMEOUT;
+ }
}
esdhc_clrsetbits32(&regs->wml, WML_WR_WML_MASK,