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author | Bin Meng <bmeng.cn@gmail.com> | 2016-01-13 19:39:03 -0800 |
---|---|---|
committer | Simon Glass <sjg@chromium.org> | 2016-01-20 19:10:14 -0700 |
commit | 6ca13b123989d6c462540dca70f8bdc379672c61 (patch) | |
tree | 0fa1ca3cbe8f0aeb078c9cc20486f01aea36824b /drivers | |
parent | ed3021af5c7ecd94298f9d70f1fdd8abdb4c545d (diff) | |
download | u-boot-imx-6ca13b123989d6c462540dca70f8bdc379672c61.zip u-boot-imx-6ca13b123989d6c462540dca70f8bdc379672c61.tar.gz u-boot-imx-6ca13b123989d6c462540dca70f8bdc379672c61.tar.bz2 |
serial: lpuart: Prepare the driver for DM conversion
Create internal routines which take lpuart's register base as
a parameter, in preparation for driver model conversion.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/serial/serial_lpuart.c | 88 |
1 files changed, 66 insertions, 22 deletions
diff --git a/drivers/serial/serial_lpuart.c b/drivers/serial/serial_lpuart.c index 0c0ab87..5cc1997 100644 --- a/drivers/serial/serial_lpuart.c +++ b/drivers/serial/serial_lpuart.c @@ -50,22 +50,19 @@ DECLARE_GLOBAL_DATA_PTR; struct lpuart_fsl *base = (struct lpuart_fsl *)LPUART_BASE; #ifndef CONFIG_LPUART_32B_REG -static void lpuart_serial_setbrg(void) +static void _lpuart_serial_setbrg(struct lpuart_fsl *base, int baudrate) { u32 clk = mxc_get_clock(MXC_UART_CLK); u16 sbr; - if (!gd->baudrate) - gd->baudrate = CONFIG_BAUDRATE; - - sbr = (u16)(clk / (16 * gd->baudrate)); + sbr = (u16)(clk / (16 * baudrate)); /* place adjustment later - n/32 BRFA */ __raw_writeb(sbr >> 8, &base->ubdh); __raw_writeb(sbr & 0xff, &base->ubdl); } -static int lpuart_serial_getc(void) +static int _lpuart_serial_getc(struct lpuart_fsl *base) { while (!(__raw_readb(&base->us1) & (US1_RDRF | US1_OR))) WATCHDOG_RESET(); @@ -75,10 +72,10 @@ static int lpuart_serial_getc(void) return __raw_readb(&base->ud); } -static void lpuart_serial_putc(const char c) +static void _lpuart_serial_putc(struct lpuart_fsl *base, const char c) { if (c == '\n') - lpuart_serial_putc('\r'); + _lpuart_serial_putc(base, '\r'); while (!(__raw_readb(&base->us1) & US1_TDRE)) WATCHDOG_RESET(); @@ -87,7 +84,7 @@ static void lpuart_serial_putc(const char c) } /* Test whether a character is in the RX buffer */ -static int lpuart_serial_tstc(void) +static int _lpuart_serial_tstc(struct lpuart_fsl *base) { if (__raw_readb(&base->urcfifo) == 0) return 0; @@ -99,7 +96,7 @@ static int lpuart_serial_tstc(void) * Initialise the serial port with the given baudrate. The settings * are always 8 data bits, no parity, 1 stop bit, no start bits. */ -static int lpuart_serial_init(void) +static int _lpuart_serial_init(struct lpuart_fsl *base) { u8 ctrl; @@ -118,13 +115,38 @@ static int lpuart_serial_init(void) __raw_writeb(CFIFO_TXFLUSH | CFIFO_RXFLUSH, &base->ucfifo); /* provide data bits, parity, stop bit, etc */ - lpuart_serial_setbrg(); + _lpuart_serial_setbrg(base, gd->baudrate); __raw_writeb(UC2_RE | UC2_TE, &base->uc2); return 0; } +static void lpuart_serial_setbrg(void) +{ + _lpuart_serial_setbrg(base, gd->baudrate); +} + +static int lpuart_serial_getc(void) +{ + return _lpuart_serial_getc(base); +} + +static void lpuart_serial_putc(const char c) +{ + _lpuart_serial_putc(base, c); +} + +static int lpuart_serial_tstc(void) +{ + return _lpuart_serial_tstc(base); +} + +static int lpuart_serial_init(void) +{ + return _lpuart_serial_init(base); +} + static struct serial_device lpuart_serial_drv = { .name = "lpuart_serial", .start = lpuart_serial_init, @@ -136,21 +158,18 @@ static struct serial_device lpuart_serial_drv = { .tstc = lpuart_serial_tstc, }; #else -static void lpuart32_serial_setbrg(void) +static void _lpuart32_serial_setbrg(struct lpuart_fsl *base, int baudrate) { u32 clk = CONFIG_SYS_CLK_FREQ; u32 sbr; - if (!gd->baudrate) - gd->baudrate = CONFIG_BAUDRATE; - - sbr = (clk / (16 * gd->baudrate)); + sbr = (clk / (16 * baudrate)); /* place adjustment later - n/32 BRFA */ out_be32(&base->baud, sbr); } -static int lpuart32_serial_getc(void) +static int _lpuart32_serial_getc(struct lpuart_fsl *base) { u32 stat; @@ -162,10 +181,10 @@ static int lpuart32_serial_getc(void) return in_be32(&base->data) & 0x3ff; } -static void lpuart32_serial_putc(const char c) +static void _lpuart32_serial_putc(struct lpuart_fsl *base, const char c) { if (c == '\n') - lpuart32_serial_putc('\r'); + _lpuart32_serial_putc(base, '\r'); while (!(in_be32(&base->stat) & STAT_TDRE)) WATCHDOG_RESET(); @@ -174,7 +193,7 @@ static void lpuart32_serial_putc(const char c) } /* Test whether a character is in the RX buffer */ -static int lpuart32_serial_tstc(void) +static int _lpuart32_serial_tstc(struct lpuart_fsl *base) { if ((in_be32(&base->water) >> 24) == 0) return 0; @@ -186,7 +205,7 @@ static int lpuart32_serial_tstc(void) * Initialise the serial port with the given baudrate. The settings * are always 8 data bits, no parity, 1 stop bit, no start bits. */ -static int lpuart32_serial_init(void) +static int _lpuart32_serial_init(struct lpuart_fsl *base) { u8 ctrl; @@ -201,13 +220,38 @@ static int lpuart32_serial_init(void) out_be32(&base->match, 0); /* provide data bits, parity, stop bit, etc */ - lpuart32_serial_setbrg(); + _lpuart32_serial_setbrg(base, gd->baudrate); out_be32(&base->ctrl, CTRL_RE | CTRL_TE); return 0; } +static void lpuart32_serial_setbrg(void) +{ + _lpuart32_serial_setbrg(base, gd->baudrate); +} + +static int lpuart32_serial_getc(void) +{ + return _lpuart32_serial_getc(base); +} + +static void lpuart32_serial_putc(const char c) +{ + _lpuart32_serial_putc(base, c); +} + +static int lpuart32_serial_tstc(void) +{ + return _lpuart32_serial_tstc(base); +} + +static int lpuart32_serial_init(void) +{ + return _lpuart32_serial_init(base); +} + static struct serial_device lpuart32_serial_drv = { .name = "lpuart32_serial", .start = lpuart32_serial_init, |