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author | Simon Glass <sjg@chromium.org> | 2016-03-06 19:27:52 -0700 |
---|---|---|
committer | Bin Meng <bmeng.cn@gmail.com> | 2016-03-17 10:27:23 +0800 |
commit | 319dba1f4d7bf2c82be1c5b0858c4b1c3d8b4cfe (patch) | |
tree | 6eaaacf60a8d96c7f46215d06a2fbf62ada3b311 /drivers | |
parent | 17c43f1a42135cdca28991658615323c2ca92e37 (diff) | |
download | u-boot-imx-319dba1f4d7bf2c82be1c5b0858c4b1c3d8b4cfe.zip u-boot-imx-319dba1f4d7bf2c82be1c5b0858c4b1c3d8b4cfe.tar.gz u-boot-imx-319dba1f4d7bf2c82be1c5b0858c4b1c3d8b4cfe.tar.bz2 |
pci: Add functions to update PCI configuration registers
It is common to read a config register value, clear and set some bits, then
write back the updated value. Add functions to do this in one step, for
convenience.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/pci/pci-uclass.c | 57 |
1 files changed, 57 insertions, 0 deletions
diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c index 519052e..cb51014 100644 --- a/drivers/pci/pci-uclass.c +++ b/drivers/pci/pci-uclass.c @@ -250,6 +250,21 @@ int pci_bus_write_config(struct udevice *bus, pci_dev_t bdf, int offset, return ops->write_config(bus, bdf, offset, value, size); } +int pci_bus_clrset_config32(struct udevice *bus, pci_dev_t bdf, int offset, + u32 clr, u32 set) +{ + ulong val; + int ret; + + ret = pci_bus_read_config(bus, bdf, offset, &val, PCI_SIZE_32); + if (ret) + return ret; + val &= ~clr; + val |= set; + + return pci_bus_write_config(bus, bdf, offset, val, PCI_SIZE_32); +} + int pci_write_config(pci_dev_t bdf, int offset, unsigned long value, enum pci_size_t size) { @@ -418,6 +433,48 @@ int dm_pci_read_config32(struct udevice *dev, int offset, u32 *valuep) return 0; } +int dm_pci_clrset_config8(struct udevice *dev, int offset, u32 clr, u32 set) +{ + u8 val; + int ret; + + ret = dm_pci_read_config8(dev, offset, &val); + if (ret) + return ret; + val &= ~clr; + val |= set; + + return dm_pci_write_config8(dev, offset, val); +} + +int dm_pci_clrset_config16(struct udevice *dev, int offset, u32 clr, u32 set) +{ + u16 val; + int ret; + + ret = dm_pci_read_config16(dev, offset, &val); + if (ret) + return ret; + val &= ~clr; + val |= set; + + return dm_pci_write_config16(dev, offset, val); +} + +int dm_pci_clrset_config32(struct udevice *dev, int offset, u32 clr, u32 set) +{ + u32 val; + int ret; + + ret = dm_pci_read_config32(dev, offset, &val); + if (ret) + return ret; + val &= ~clr; + val |= set; + + return dm_pci_write_config32(dev, offset, val); +} + static void set_vga_bridge_bits(struct udevice *dev) { struct udevice *parent = dev->parent; |