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| author | Stefan Agner <stefan.agner@toradex.com> | 2016-08-01 23:55:18 -0700 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2016-09-06 18:22:48 +0200 |
| commit | 2a83c95fdb9c2f735d1c30c71bc52f6fd8aa0f97 (patch) | |
| tree | 8ea80c18cfe906ace52ebf6bfe500c79db5c35e8 /drivers | |
| parent | 0a22c7f0dc6265da71a522b78bc7a04d3ca934c3 (diff) | |
| download | u-boot-imx-2a83c95fdb9c2f735d1c30c71bc52f6fd8aa0f97.zip u-boot-imx-2a83c95fdb9c2f735d1c30c71bc52f6fd8aa0f97.tar.gz u-boot-imx-2a83c95fdb9c2f735d1c30c71bc52f6fd8aa0f97.tar.bz2 | |
mtd: nand: mxs: fix cache alignment for cache lines >32
Currently the command buffer gets allocated with a size of 32 bytes.
This causes warning messages on systems with cache lines bigger than
32 bytes:
CACHE: Misaligned operation at range [9df17a00, 9df17a20]
Define command buffer to be at least 32 bytes, but more if cache
line is bigger.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/mtd/nand/mxs_nand.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c index 94fc5c1..4bf564e 100644 --- a/drivers/mtd/nand/mxs_nand.c +++ b/drivers/mtd/nand/mxs_nand.c @@ -37,7 +37,12 @@ #endif #define MXS_NAND_METADATA_SIZE 10 #define MXS_NAND_BITS_PER_ECC_LEVEL 13 + +#if !defined(CONFIG_SYS_CACHELINE_SIZE) || CONFIG_SYS_CACHELINE_SIZE < 32 #define MXS_NAND_COMMAND_BUFFER_SIZE 32 +#else +#define MXS_NAND_COMMAND_BUFFER_SIZE CONFIG_SYS_CACHELINE_SIZE +#endif #define MXS_NAND_BCH_TIMEOUT 10000 |