Merge branch 'master' of git://git.denx.de/u-boot-sunxi

4 files changed, 288 insertions, 26 deletions

diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig
index e69de29..1ec7c0e 100644
--- a/drivers/power/Kconfig
+++ b/drivers/power/Kconfig
@@ -0,0 +1,47 @@
+config AXP221_POWER
+	boolean "axp221 pmic support"
+	depends on MACH_SUN6I
+	default y
+	---help---
+	Say y here to enable support for the axp221 pmic found on most sun6i
+	(A31) boards.
+
+config AXP221_DLDO1_VOLT
+	int "axp221 dldo1 voltage"
+	depends on AXP221_POWER
+	default -1
+	---help---
+	Set the voltage (mV) to program the axp221 dldo1 at, set to -1 to
+	disable dldo1.
+
+config AXP221_DLDO4_VOLT
+	int "axp221 dldo4 voltage"
+	depends on AXP221_POWER
+	default -1
+	---help---
+	Set the voltage (mV) to program the axp221 dldo4 at, set to -1 to
+	disable dldo4.
+
+config AXP221_ALDO1_VOLT
+	int "axp221 aldo1 voltage"
+	depends on AXP221_POWER
+	default -1
+	---help---
+	Set the voltage (mV) to program the axp221 aldo1 at, set to -1 to
+	disable aldo1.
+
+config AXP221_ALDO2_VOLT
+	int "axp221 aldo2 voltage"
+	depends on AXP221_POWER
+	default -1
+	---help---
+	Set the voltage (mV) to program the axp221 aldo2 at, set to -1 to
+	disable aldo2.
+
+config AXP221_ALDO3_VOLT
+	int "axp221 aldo3 voltage"
+	depends on AXP221_POWER
+	default -1
+	---help---
+	Set the voltage (mV) to program the axp221 aldo3 at, set to -1 to
+	disable aldo3.
diff --git a/drivers/power/Makefile b/drivers/power/Makefile
index dc64e4d..04bd996 100644
--- a/drivers/power/Makefile
+++ b/drivers/power/Makefile
@@ -7,6 +7,7 @@
 
 obj-$(CONFIG_AXP152_POWER)	+= axp152.o
 obj-$(CONFIG_AXP209_POWER)	+= axp209.o
+obj-$(CONFIG_AXP221_POWER)	+= axp221.o
 obj-$(CONFIG_EXYNOS_TMU)	+= exynos-tmu.o
 obj-$(CONFIG_FTPMU010_POWER)	+= ftpmu010.o
 obj-$(CONFIG_TPS6586X_POWER)	+= tps6586x.o
diff --git a/drivers/power/axp221.c b/drivers/power/axp221.c
new file mode 100644
index 0000000..941193a
--- /dev/null
+++ b/drivers/power/axp221.c
@@ -0,0 +1,186 @@
+/*
+ * (C) Copyright 2013 Oliver Schinagl <oliver@schinagl.nl>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <errno.h>
+#include <asm/arch/p2wi.h>
+#include <axp221.h>
+
+static u8 axp221_mvolt_to_cfg(int mvolt, int min, int max, int div)
+{
+	if (mvolt < min)
+		mvolt = min;
+	else if (mvolt > max)
+		mvolt = max;
+
+	return (mvolt - min) / div;
+}
+
+static int axp221_setbits(u8 reg, u8 bits)
+{
+	int ret;
+	u8 val;
+
+	ret = p2wi_read(reg, &val);
+	if (ret)
+		return ret;
+
+	val |= bits;
+	return p2wi_write(reg, val);
+}
+
+int axp221_set_dcdc1(unsigned int mvolt)
+{
+	int ret;
+	u8 cfg = axp221_mvolt_to_cfg(mvolt, 1600, 3400, 100);
+
+	ret = p2wi_write(AXP221_DCDC1_CTRL, cfg);
+	if (ret)
+		return ret;
+
+	return axp221_setbits(AXP221_OUTPUT_CTRL2,
+			      AXP221_OUTPUT_CTRL2_DCDC1_EN);
+}
+
+int axp221_set_dcdc2(unsigned int mvolt)
+{
+	u8 cfg = axp221_mvolt_to_cfg(mvolt, 600, 1540, 20);
+
+	return p2wi_write(AXP221_DCDC2_CTRL, cfg);
+}
+
+int axp221_set_dcdc3(unsigned int mvolt)
+{
+	u8 cfg = axp221_mvolt_to_cfg(mvolt, 600, 1860, 20);
+
+	return p2wi_write(AXP221_DCDC3_CTRL, cfg);
+}
+
+int axp221_set_dcdc4(unsigned int mvolt)
+{
+	u8 cfg = axp221_mvolt_to_cfg(mvolt, 600, 1540, 20);
+
+	return p2wi_write(AXP221_DCDC4_CTRL, cfg);
+}
+
+int axp221_set_dcdc5(unsigned int mvolt)
+{
+	u8 cfg = axp221_mvolt_to_cfg(mvolt, 1000, 2550, 50);
+
+	return p2wi_write(AXP221_DCDC5_CTRL, cfg);
+}
+
+int axp221_set_dldo1(unsigned int mvolt)
+{
+	int ret;
+	u8 cfg = axp221_mvolt_to_cfg(mvolt, 700, 3300, 100);
+
+	ret = p2wi_write(AXP221_DLDO1_CTRL, cfg);
+	if (ret)
+		return ret;
+
+	return axp221_setbits(AXP221_OUTPUT_CTRL2,
+			      AXP221_OUTPUT_CTRL2_DLDO1_EN);
+}
+
+int axp221_set_dldo2(unsigned int mvolt)
+{
+	int ret;
+	u8 cfg = axp221_mvolt_to_cfg(mvolt, 700, 3300, 100);
+
+	ret = p2wi_write(AXP221_DLDO2_CTRL, cfg);
+	if (ret)
+		return ret;
+
+	return axp221_setbits(AXP221_OUTPUT_CTRL2,
+			      AXP221_OUTPUT_CTRL2_DLDO2_EN);
+}
+
+int axp221_set_dldo3(unsigned int mvolt)
+{
+	int ret;
+	u8 cfg = axp221_mvolt_to_cfg(mvolt, 700, 3300, 100);
+
+	ret = p2wi_write(AXP221_DLDO3_CTRL, cfg);
+	if (ret)
+		return ret;
+
+	return axp221_setbits(AXP221_OUTPUT_CTRL2,
+			      AXP221_OUTPUT_CTRL2_DLDO3_EN);
+}
+
+int axp221_set_dldo4(unsigned int mvolt)
+{
+	int ret;
+	u8 cfg = axp221_mvolt_to_cfg(mvolt, 700, 3300, 100);
+
+	ret = p2wi_write(AXP221_DLDO4_CTRL, cfg);
+	if (ret)
+		return ret;
+
+	return axp221_setbits(AXP221_OUTPUT_CTRL2,
+			      AXP221_OUTPUT_CTRL2_DLDO4_EN);
+}
+
+int axp221_set_aldo1(unsigned int mvolt)
+{
+	int ret;
+	u8 cfg = axp221_mvolt_to_cfg(mvolt, 700, 3300, 100);
+
+	ret = p2wi_write(AXP221_ALDO1_CTRL, cfg);
+	if (ret)
+		return ret;
+
+	return axp221_setbits(AXP221_OUTPUT_CTRL1,
+			      AXP221_OUTPUT_CTRL1_ALDO1_EN);
+}
+
+int axp221_set_aldo2(unsigned int mvolt)
+{
+	int ret;
+	u8 cfg = axp221_mvolt_to_cfg(mvolt, 700, 3300, 100);
+
+	ret = p2wi_write(AXP221_ALDO2_CTRL, cfg);
+	if (ret)
+		return ret;
+
+	return axp221_setbits(AXP221_OUTPUT_CTRL1,
+			      AXP221_OUTPUT_CTRL1_ALDO2_EN);
+}
+
+int axp221_set_aldo3(unsigned int mvolt)
+{
+	int ret;
+	u8 cfg = axp221_mvolt_to_cfg(mvolt, 700, 3300, 100);
+
+	ret = p2wi_write(AXP221_ALDO3_CTRL, cfg);
+	if (ret)
+		return ret;
+
+	return axp221_setbits(AXP221_OUTPUT_CTRL3,
+			      AXP221_OUTPUT_CTRL3_ALDO3_EN);
+}
+
+int axp221_init(void)
+{
+	u8 axp_chip_id;
+	int ret;
+
+	p2wi_init();
+	ret = p2wi_change_to_p2wi_mode(AXP221_CHIP_ADDR, AXP221_CTRL_ADDR,
+				       AXP221_INIT_DATA);
+	if (ret)
+		return ret;
+
+	ret = p2wi_read(AXP221_CHIP_ID, &axp_chip_id);
+	if (ret)
+		return ret;
+
+	if (!(axp_chip_id == 0x6 || axp_chip_id == 0x7 || axp_chip_id == 0x17))
+		return -ENODEV;
+
+	return 0;
+}
diff --git a/drivers/usb/host/ehci-sunxi.c b/drivers/usb/host/ehci-sunxi.c
index 4befd57..cc9a8fa 100644
--- a/drivers/usb/host/ehci-sunxi.c
+++ b/drivers/usb/host/ehci-sunxi.c
@@ -10,16 +10,14 @@
  */
 
 #include <asm/arch/clock.h>
+#include <asm/arch/cpu.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
 #include <common.h>
 #include "ehci.h"
 
-#define SUNXI_USB1_IO_BASE		0x01c14000
-#define SUNXI_USB2_IO_BASE		0x01c1c000
-
 #define SUNXI_USB_PMU_IRQ_ENABLE	0x800
-#define SUNXI_USB_CSR			0x01c13404
+#define SUNXI_USB_CSR			0x404
 #define SUNXI_USB_PASSBY_EN		1
 
 #define SUNXI_EHCI_AHB_ICHR8_EN		(1 << 10)
@@ -32,25 +30,28 @@ static struct sunxi_ehci_hcd {
 	int usb_rst_mask;
 	int ahb_clk_mask;
 	int gpio_vbus;
-	void *csr;
 	int irq;
 	int id;
 } sunxi_echi_hcd[] = {
 	{
-		.usb_rst_mask = CCM_USB_CTRL_PHY1_RST,
+		.usb_rst_mask = CCM_USB_CTRL_PHY1_RST | CCM_USB_CTRL_PHY1_CLK,
 		.ahb_clk_mask = 1 << AHB_GATE_OFFSET_USB_EHCI0,
-		.gpio_vbus = CONFIG_SUNXI_USB_VBUS0_GPIO,
-		.csr = (void *)SUNXI_USB_CSR,
+#ifndef CONFIG_MACH_SUN6I
 		.irq = 39,
+#else
+		.irq = 72,
+#endif
 		.id = 1,
 	},
 #if (CONFIG_USB_MAX_CONTROLLER_COUNT > 1)
 	{
-		.usb_rst_mask = CCM_USB_CTRL_PHY2_RST,
+		.usb_rst_mask = CCM_USB_CTRL_PHY2_RST | CCM_USB_CTRL_PHY2_CLK,
 		.ahb_clk_mask = 1 << AHB_GATE_OFFSET_USB_EHCI1,
-		.gpio_vbus = CONFIG_SUNXI_USB_VBUS1_GPIO,
-		.csr = (void *)SUNXI_USB_CSR,
+#ifndef CONFIG_MACH_SUN6I
 		.irq = 40,
+#else
+		.irq = 74,
+#endif
 		.id = 2,
 	}
 #endif
@@ -60,19 +61,32 @@ static int enabled_hcd_count;
 
 static void *get_io_base(int hcd_id)
 {
-	if (hcd_id == 1)
-		return (void *)SUNXI_USB1_IO_BASE;
-	else if (hcd_id == 2)
-		return (void *)SUNXI_USB2_IO_BASE;
-	else
+	switch (hcd_id) {
+	case 0:
+		return (void *)SUNXI_USB0_BASE;
+	case 1:
+		return (void *)SUNXI_USB1_BASE;
+	case 2:
+		return (void *)SUNXI_USB2_BASE;
+	default:
 		return NULL;
+	}
+}
+
+static int get_vbus_gpio(int hcd_id)
+{
+	switch (hcd_id) {
+	case 1: return sunxi_name_to_gpio(CONFIG_USB1_VBUS_PIN);
+	case 2: return sunxi_name_to_gpio(CONFIG_USB2_VBUS_PIN);
+	}
+	return -1;
 }
 
 static void usb_phy_write(struct sunxi_ehci_hcd *sunxi_ehci, int addr,
 			  int data, int len)
 {
 	int j = 0, usbc_bit = 0;
-	void *dest = sunxi_ehci->csr;
+	void *dest = get_io_base(0) + SUNXI_USB_CSR;
 
 	usbc_bit = 1 << (sunxi_ehci->id * 2);
 	for (j = 0; j < len; j++) {
@@ -105,7 +119,7 @@ static void sunxi_usb_phy_init(struct sunxi_ehci_hcd *sunxi_ehci)
 	usb_phy_write(sunxi_ehci, 0x20, 0x14, 5);
 
 	/* threshold adjustment disconnect */
-#ifdef CONFIG_MACH_SUN4I
+#if defined CONFIG_MACH_SUN4I || defined CONFIG_MACH_SUN6I
 	usb_phy_write(sunxi_ehci, 0x2a, 3, 2);
 #else
 	usb_phy_write(sunxi_ehci, 0x2a, 2, 2);
@@ -138,22 +152,30 @@ static void sunxi_ehci_enable(struct sunxi_ehci_hcd *sunxi_ehci)
 
 	setbits_le32(&ccm->usb_clk_cfg, sunxi_ehci->usb_rst_mask);
 	setbits_le32(&ccm->ahb_gate0, sunxi_ehci->ahb_clk_mask);
+#ifdef CONFIG_MACH_SUN6I
+	setbits_le32(&ccm->ahb_reset0_cfg, sunxi_ehci->ahb_clk_mask);
+#endif
 
 	sunxi_usb_phy_init(sunxi_ehci);
 
 	sunxi_usb_passby(sunxi_ehci, SUNXI_USB_PASSBY_EN);
 
-	gpio_direction_output(sunxi_ehci->gpio_vbus, 1);
+	if (sunxi_ehci->gpio_vbus != -1)
+		gpio_direction_output(sunxi_ehci->gpio_vbus, 1);
 }
 
 static void sunxi_ehci_disable(struct sunxi_ehci_hcd *sunxi_ehci)
 {
 	struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
 
-	gpio_direction_output(sunxi_ehci->gpio_vbus, 0);
+	if (sunxi_ehci->gpio_vbus != -1)
+		gpio_direction_output(sunxi_ehci->gpio_vbus, 0);
 
 	sunxi_usb_passby(sunxi_ehci, !SUNXI_USB_PASSBY_EN);
 
+#ifdef CONFIG_MACH_SUN6I
+	clrbits_le32(&ccm->ahb_reset0_cfg, sunxi_ehci->ahb_clk_mask);
+#endif
 	clrbits_le32(&ccm->ahb_gate0, sunxi_ehci->ahb_clk_mask);
 	clrbits_le32(&ccm->usb_clk_cfg, sunxi_ehci->usb_rst_mask);
 }
@@ -165,13 +187,17 @@ int ehci_hcd_init(int index, enum usb_init_type init, struct ehci_hccr **hccr,
 	struct sunxi_ehci_hcd *sunxi_ehci = &sunxi_echi_hcd[index];
 	int err;
 
+	sunxi_ehci->gpio_vbus = get_vbus_gpio(sunxi_ehci->id);
+
 	/* enable common PHY only once */
 	if (index == 0)
 		setbits_le32(&ccm->usb_clk_cfg, CCM_USB_CTRL_PHYGATE);
 
-	err = gpio_request(sunxi_ehci->gpio_vbus, "ehci_vbus");
-	if (err)
-		return err;
+	if (sunxi_ehci->gpio_vbus != -1) {
+		err = gpio_request(sunxi_ehci->gpio_vbus, "ehci_vbus");
+		if (err)
+			return err;
+	}
 
 	sunxi_ehci_enable(sunxi_ehci);
 
@@ -197,9 +223,11 @@ int ehci_hcd_stop(int index)
 
 	sunxi_ehci_disable(sunxi_ehci);
 
-	err = gpio_free(sunxi_ehci->gpio_vbus);
-	if (err)
-		return err;
+	if (sunxi_ehci->gpio_vbus != -1) {
+		err = gpio_free(sunxi_ehci->gpio_vbus);
+		if (err)
+			return err;
+	}
 
 	/* disable common PHY only once, for the last enabled hcd */
 	if (enabled_hcd_count == 1)