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authorSteve Rae <srae@broadcom.com>2016-06-07 15:35:21 -0700
committerMarek Vasut <marex@denx.de>2016-06-13 15:16:34 +0200
commitf221db0ed5b4c6580abb4ab6fde5cbabaa348350 (patch)
treebc7116d7d94f6f2d9118751c2566af788a807b90 /drivers/usb/gadget
parent6b3943f1b04be60f147ee540fbd72c4c7ea89f80 (diff)
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usb: dwc2_udc_otg: support 8-bit interface
Define CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8 to allow the physical interface to be 8-bit (rather than 16-bit). Signed-off-by: Steve Rae <srae@broadcom.com>
Diffstat (limited to 'drivers/usb/gadget')
-rw-r--r--drivers/usb/gadget/Kconfig10
-rw-r--r--drivers/usb/gadget/dwc2_udc_otg.c4
2 files changed, 14 insertions, 0 deletions
diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
index a35a1c7..ae62476 100644
--- a/drivers/usb/gadget/Kconfig
+++ b/drivers/usb/gadget/Kconfig
@@ -52,6 +52,16 @@ config USB_GADGET_DWC2_OTG
driver to operate in Peripheral mode. This option requires
USB_GADGET to be enabled.
+if USB_GADGET_DWC2_OTG
+
+config USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8
+ bool "DesignWare USB2.0 HS OTG controller 8-bit PHY bus width"
+ help
+ Set the Designware USB2.0 high-speed OTG controller
+ PHY interface width to 8 bits, rather than the default (16 bits).
+
+endif # USB_GADGET_DWC2_OTG
+
config CI_UDC
bool "ChipIdea device controller"
select USB_GADGET_DUALSPEED
diff --git a/drivers/usb/gadget/dwc2_udc_otg.c b/drivers/usb/gadget/dwc2_udc_otg.c
index cb20b00..a23278d 100644
--- a/drivers/usb/gadget/dwc2_udc_otg.c
+++ b/drivers/usb/gadget/dwc2_udc_otg.c
@@ -415,7 +415,11 @@ static void reconfig_usbd(struct dwc2_udc *dev)
|0<<7 /* Ulpi DDR sel*/
|0<<6 /* 0: high speed utmi+, 1: full speed serial*/
|0<<4 /* 0: utmi+, 1:ulpi*/
+#ifdef CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8
+ |0<<3 /* phy i/f 0:8bit, 1:16bit*/
+#else
|1<<3 /* phy i/f 0:8bit, 1:16bit*/
+#endif
|0x7<<0; /* HS/FS Timeout**/
if (dev->pdata->usb_gusbcfg)