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authorXu Ziyuan <xzy.xu@rock-chips.com>2016-07-14 14:52:33 +0800
committerSimon Glass <sjg@chromium.org>2016-07-25 20:44:19 -0600
commit47117882671fbfb5ffa20cd25ec29da5b7143009 (patch)
treeaf154f368604db8b587b20722e356e80d9d5b2ad /drivers/usb/gadget
parentfab3357916096d4c61a5e2fe5d28f5aeb78c6957 (diff)
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usb: dwc2-otg: adjust fifo size via platform data
The total FIFO size of some SoCs may be different from the existen, this patch supports fifo size setting from platform data. Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'drivers/usb/gadget')
-rw-r--r--drivers/usb/gadget/dwc2_udc_otg.c22
-rw-r--r--drivers/usb/gadget/dwc2_udc_otg_regs.h6
2 files changed, 19 insertions, 9 deletions
diff --git a/drivers/usb/gadget/dwc2_udc_otg.c b/drivers/usb/gadget/dwc2_udc_otg.c
index a23278d..029927f 100644
--- a/drivers/usb/gadget/dwc2_udc_otg.c
+++ b/drivers/usb/gadget/dwc2_udc_otg.c
@@ -403,6 +403,7 @@ static void reconfig_usbd(struct dwc2_udc *dev)
int i;
unsigned int uTemp = writel(CORE_SOFT_RESET, &reg->grstctl);
uint32_t dflt_gusbcfg;
+ uint32_t rx_fifo_sz, tx_fifo_sz, np_tx_fifo_sz;
debug("Reseting OTG controller\n");
@@ -467,18 +468,27 @@ static void reconfig_usbd(struct dwc2_udc *dev)
/* 10. Unmask device IN EP common interrupts*/
writel(DIEPMSK_INIT, &reg->diepmsk);
+ rx_fifo_sz = RX_FIFO_SIZE;
+ np_tx_fifo_sz = NPTX_FIFO_SIZE;
+ tx_fifo_sz = PTX_FIFO_SIZE;
+
+ if (dev->pdata->rx_fifo_sz)
+ rx_fifo_sz = dev->pdata->rx_fifo_sz;
+ if (dev->pdata->np_tx_fifo_sz)
+ np_tx_fifo_sz = dev->pdata->np_tx_fifo_sz;
+ if (dev->pdata->tx_fifo_sz)
+ tx_fifo_sz = dev->pdata->tx_fifo_sz;
+
/* 11. Set Rx FIFO Size (in 32-bit words) */
- writel(RX_FIFO_SIZE >> 2, &reg->grxfsiz);
+ writel(rx_fifo_sz, &reg->grxfsiz);
/* 12. Set Non Periodic Tx FIFO Size */
- writel((NPTX_FIFO_SIZE >> 2) << 16 | ((RX_FIFO_SIZE >> 2)) << 0,
+ writel((np_tx_fifo_sz << 16) | rx_fifo_sz,
&reg->gnptxfsiz);
for (i = 1; i < DWC2_MAX_HW_ENDPOINTS; i++)
- writel((PTX_FIFO_SIZE >> 2) << 16 |
- ((RX_FIFO_SIZE + NPTX_FIFO_SIZE +
- PTX_FIFO_SIZE*(i-1)) >> 2) << 0,
- &reg->dieptxf[i-1]);
+ writel((rx_fifo_sz + np_tx_fifo_sz + tx_fifo_sz*(i-1)) |
+ tx_fifo_sz << 16, &reg->dieptxf[i-1]);
/* Flush the RX FIFO */
writel(RX_FIFO_FLUSH, &reg->grstctl);
diff --git a/drivers/usb/gadget/dwc2_udc_otg_regs.h b/drivers/usb/gadget/dwc2_udc_otg_regs.h
index 78ec90e..c94396a 100644
--- a/drivers/usb/gadget/dwc2_udc_otg_regs.h
+++ b/drivers/usb/gadget/dwc2_udc_otg_regs.h
@@ -130,9 +130,9 @@ struct dwc2_usbotg_reg {
#define HIGH_SPEED_CONTROL_PKT_SIZE 64
#define HIGH_SPEED_BULK_PKT_SIZE 512
-#define RX_FIFO_SIZE (1024*4)
-#define NPTX_FIFO_SIZE (1024*4)
-#define PTX_FIFO_SIZE (1536*1)
+#define RX_FIFO_SIZE (1024)
+#define NPTX_FIFO_SIZE (1024)
+#define PTX_FIFO_SIZE (384)
#define DEPCTL_TXFNUM_0 (0x0<<22)
#define DEPCTL_TXFNUM_1 (0x1<<22)