drivers/sysreset: group sysreset drivers

Create drivers/sysreset and move sysreset-uclass and all sysreset
drivers there.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

8 files changed, 390 insertions, 0 deletions

diff --git a/drivers/sysreset/Kconfig b/drivers/sysreset/Kconfig
new file mode 100644
index 0000000..05a37b9
--- /dev/null
+++ b/drivers/sysreset/Kconfig
@@ -0,0 +1,16 @@
+#
+# System reset devices
+#
+
+menu "System reset device drivers"
+
+config SYSRESET
+	bool "Enable support for system reset drivers"
+	depends on DM
+	help
+	  Enable system reset drivers which can be used to reset the CPU or
+	  board. Each driver can provide a reset method which will be called
+	  to effect a reset. The uclass will try all available drivers when
+	  reset_walk() is called.
+
+endmenu
diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile
new file mode 100644
index 0000000..7db1b69
--- /dev/null
+++ b/drivers/sysreset/Makefile
@@ -0,0 +1,15 @@
+#
+# (C) Copyright 2016 Cadence Design Systems Inc.
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-$(CONFIG_SYSRESET) += sysreset-uclass.o
+
+ifndef CONFIG_SPL_BUILD
+obj-$(CONFIG_ROCKCHIP_RK3036) += sysreset_rk3036.o
+endif
+obj-$(CONFIG_ROCKCHIP_RK3288) += sysreset_rk3288.o
+obj-$(CONFIG_ROCKCHIP_RK3399) += sysreset_rk3399.o
+obj-$(CONFIG_SANDBOX) += sysreset_sandbox.o
+obj-$(CONFIG_ARCH_SNAPDRAGON) += sysreset_snapdragon.o
diff --git a/drivers/sysreset/sysreset-uclass.c b/drivers/sysreset/sysreset-uclass.c
new file mode 100644
index 0000000..3566d17
--- /dev/null
+++ b/drivers/sysreset/sysreset-uclass.c
@@ -0,0 +1,81 @@
+/*
+ * Copyright (C) 2015 Google, Inc
+ * Written by Simon Glass <sjg@chromium.org>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <sysreset.h>
+#include <dm.h>
+#include <errno.h>
+#include <regmap.h>
+#include <dm/device-internal.h>
+#include <dm/lists.h>
+#include <dm/root.h>
+#include <linux/err.h>
+
+int sysreset_request(struct udevice *dev, enum sysreset_t type)
+{
+	struct sysreset_ops *ops = sysreset_get_ops(dev);
+
+	if (!ops->request)
+		return -ENOSYS;
+
+	return ops->request(dev, type);
+}
+
+int sysreset_walk(enum sysreset_t type)
+{
+	struct udevice *dev;
+	int ret = -ENOSYS;
+
+	while (ret != -EINPROGRESS && type < SYSRESET_COUNT) {
+		for (uclass_first_device(UCLASS_SYSRESET, &dev);
+		     dev;
+		     uclass_next_device(&dev)) {
+			ret = sysreset_request(dev, type);
+			if (ret == -EINPROGRESS)
+				break;
+		}
+		type++;
+	}
+
+	return ret;
+}
+
+void sysreset_walk_halt(enum sysreset_t type)
+{
+	int ret;
+
+	ret = sysreset_walk(type);
+
+	/* Wait for the reset to take effect */
+	if (ret == -EINPROGRESS)
+		mdelay(100);
+
+	/* Still no reset? Give up */
+	debug("System reset not supported on this platform\n");
+	hang();
+}
+
+/**
+ * reset_cpu() - calls sysreset_walk(SYSRESET_WARM)
+ */
+void reset_cpu(ulong addr)
+{
+	sysreset_walk_halt(SYSRESET_WARM);
+}
+
+
+int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+	sysreset_walk_halt(SYSRESET_WARM);
+
+	return 0;
+}
+
+UCLASS_DRIVER(sysreset) = {
+	.id		= UCLASS_SYSRESET,
+	.name		= "sysreset",
+};
diff --git a/drivers/sysreset/sysreset_rk3036.c b/drivers/sysreset/sysreset_rk3036.c
new file mode 100644
index 0000000..b3d2113
--- /dev/null
+++ b/drivers/sysreset/sysreset_rk3036.c
@@ -0,0 +1,45 @@
+/*
+ * (C) Copyright 2015 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <sysreset.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/cru_rk3036.h>
+#include <asm/arch/hardware.h>
+#include <linux/err.h>
+
+int rk3036_sysreset_request(struct udevice *dev, enum sysreset_t type)
+{
+	struct rk3036_cru *cru = rockchip_get_cru();
+
+	if (IS_ERR(cru))
+		return PTR_ERR(cru);
+	switch (type) {
+	case SYSRESET_WARM:
+		writel(0xeca8, &cru->cru_glb_srst_snd_value);
+		break;
+	case SYSRESET_COLD:
+		writel(0xfdb9, &cru->cru_glb_srst_fst_value);
+		break;
+	default:
+		return -EPROTONOSUPPORT;
+	}
+
+	return -EINPROGRESS;
+}
+
+static struct sysreset_ops rk3036_sysreset = {
+	.request	= rk3036_sysreset_request,
+};
+
+U_BOOT_DRIVER(sysreset_rk3036) = {
+	.name	= "rk3036_sysreset",
+	.id	= UCLASS_SYSRESET,
+	.ops	= &rk3036_sysreset,
+};
diff --git a/drivers/sysreset/sysreset_rk3288.c b/drivers/sysreset/sysreset_rk3288.c
new file mode 100644
index 0000000..0aad1c2
--- /dev/null
+++ b/drivers/sysreset/sysreset_rk3288.c
@@ -0,0 +1,47 @@
+/*
+ * (C) Copyright 2015 Google, Inc
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <sysreset.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/cru_rk3288.h>
+#include <asm/arch/hardware.h>
+#include <linux/err.h>
+
+int rk3288_sysreset_request(struct udevice *dev, enum sysreset_t type)
+{
+	struct rk3288_cru *cru = rockchip_get_cru();
+
+	if (IS_ERR(cru))
+		return PTR_ERR(cru);
+	switch (type) {
+	case SYSRESET_WARM:
+		rk_clrreg(&cru->cru_mode_con, 0xffff);
+		writel(0xeca8, &cru->cru_glb_srst_snd_value);
+		break;
+	case SYSRESET_COLD:
+		rk_clrreg(&cru->cru_mode_con, 0xffff);
+		writel(0xfdb9, &cru->cru_glb_srst_fst_value);
+		break;
+	default:
+		return -EPROTONOSUPPORT;
+	}
+
+	return -EINPROGRESS;
+}
+
+static struct sysreset_ops rk3288_sysreset = {
+	.request	= rk3288_sysreset_request,
+};
+
+U_BOOT_DRIVER(sysreset_rk3288) = {
+	.name	= "rk3288_sysreset",
+	.id	= UCLASS_SYSRESET,
+	.ops	= &rk3288_sysreset,
+};
diff --git a/drivers/sysreset/sysreset_rk3399.c b/drivers/sysreset/sysreset_rk3399.c
new file mode 100644
index 0000000..9a55546
--- /dev/null
+++ b/drivers/sysreset/sysreset_rk3399.c
@@ -0,0 +1,45 @@
+/*
+ * (C) Copyright 2016 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <sysreset.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/cru_rk3399.h>
+#include <asm/arch/hardware.h>
+#include <linux/err.h>
+
+int rk3399_sysreset_request(struct udevice *dev, enum sysreset_t type)
+{
+	struct rk3399_cru *cru = rockchip_get_cru();
+
+	if (IS_ERR(cru))
+		return PTR_ERR(cru);
+	switch (type) {
+	case SYSRESET_WARM:
+		writel(0xeca8, &cru->glb_srst_snd_value);
+		break;
+	case SYSRESET_COLD:
+		writel(0xfdb9, &cru->glb_srst_fst_value);
+		break;
+	default:
+		return -EPROTONOSUPPORT;
+	}
+
+	return -EINPROGRESS;
+}
+
+static struct sysreset_ops rk3399_sysreset = {
+	.request	= rk3399_sysreset_request,
+};
+
+U_BOOT_DRIVER(sysreset_rk3399) = {
+	.name	= "rk3399_sysreset",
+	.id	= UCLASS_SYSRESET,
+	.ops	= &rk3399_sysreset,
+};
diff --git a/drivers/sysreset/sysreset_sandbox.c b/drivers/sysreset/sysreset_sandbox.c
new file mode 100644
index 0000000..7ae7f38
--- /dev/null
+++ b/drivers/sysreset/sysreset_sandbox.c
@@ -0,0 +1,101 @@
+/*
+ * Copyright (c) 2015 Google, Inc
+ * Written by Simon Glass <sjg@chromium.org>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <sysreset.h>
+#include <asm/state.h>
+#include <asm/test.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static int sandbox_warm_sysreset_request(struct udevice *dev,
+					 enum sysreset_t type)
+{
+	struct sandbox_state *state = state_get_current();
+
+	switch (type) {
+	case SYSRESET_WARM:
+		state->last_sysreset = type;
+		break;
+	default:
+		return -ENOSYS;
+	}
+	if (!state->sysreset_allowed[type])
+		return -EACCES;
+
+	return -EINPROGRESS;
+}
+
+static int sandbox_sysreset_request(struct udevice *dev, enum sysreset_t type)
+{
+	struct sandbox_state *state = state_get_current();
+
+	/*
+	 * If we have a device tree, the device we created from platform data
+	 * (see the U_BOOT_DEVICE() declaration below) should not do anything.
+	 * If we are that device, return an error.
+	 */
+	if (state->fdt_fname && dev->of_offset == -1)
+		return -ENODEV;
+
+	switch (type) {
+	case SYSRESET_COLD:
+		state->last_sysreset = type;
+		break;
+	case SYSRESET_POWER:
+		state->last_sysreset = type;
+		if (!state->sysreset_allowed[type])
+			return -EACCES;
+		sandbox_exit();
+		break;
+	default:
+		return -ENOSYS;
+	}
+	if (!state->sysreset_allowed[type])
+		return -EACCES;
+
+	return -EINPROGRESS;
+}
+
+static struct sysreset_ops sandbox_sysreset_ops = {
+	.request	= sandbox_sysreset_request,
+};
+
+static const struct udevice_id sandbox_sysreset_ids[] = {
+	{ .compatible = "sandbox,reset" },
+	{ }
+};
+
+U_BOOT_DRIVER(sysreset_sandbox) = {
+	.name		= "sysreset_sandbox",
+	.id		= UCLASS_SYSRESET,
+	.of_match	= sandbox_sysreset_ids,
+	.ops		= &sandbox_sysreset_ops,
+};
+
+static struct sysreset_ops sandbox_warm_sysreset_ops = {
+	.request	= sandbox_warm_sysreset_request,
+};
+
+static const struct udevice_id sandbox_warm_sysreset_ids[] = {
+	{ .compatible = "sandbox,warm-reset" },
+	{ }
+};
+
+U_BOOT_DRIVER(warm_sysreset_sandbox) = {
+	.name		= "warm_sysreset_sandbox",
+	.id		= UCLASS_SYSRESET,
+	.of_match	= sandbox_warm_sysreset_ids,
+	.ops		= &sandbox_warm_sysreset_ops,
+};
+
+/* This is here in case we don't have a device tree */
+U_BOOT_DEVICE(sysreset_sandbox_non_fdt) = {
+	.name = "sysreset_sandbox",
+};
diff --git a/drivers/sysreset/sysreset_snapdragon.c b/drivers/sysreset/sysreset_snapdragon.c
new file mode 100644
index 0000000..a6cabfb
--- /dev/null
+++ b/drivers/sysreset/sysreset_snapdragon.c
@@ -0,0 +1,40 @@
+/*
+ * Qualcomm APQ8016 reset controller driver
+ *
+ * (C) Copyright 2015 Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <sysreset.h>
+#include <asm/io.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static int msm_sysreset_request(struct udevice *dev, enum sysreset_t type)
+{
+	phys_addr_t addr = dev_get_addr(dev);
+	if (!addr)
+		return -EINVAL;
+	writel(0, addr);
+	return -EINPROGRESS;
+}
+
+static struct sysreset_ops msm_sysreset_ops = {
+	.request	= msm_sysreset_request,
+};
+
+static const struct udevice_id msm_sysreset_ids[] = {
+	{ .compatible = "qcom,pshold" },
+	{ }
+};
+
+U_BOOT_DRIVER(msm_reset) = {
+	.name		= "msm_sysreset",
+	.id		= UCLASS_SYSRESET,
+	.of_match	= msm_sysreset_ids,
+	.ops		= &msm_sysreset_ops,
+};