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author | Jagan Teki <jteki@openedev.com> | 2015-08-17 18:31:39 +0530 |
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committer | Jagan Teki <jteki@openedev.com> | 2015-10-25 20:17:02 +0530 |
commit | 191269987c3c9ee4943ffa29d078999362342966 (patch) | |
tree | 6bd10ba028c7ee6c3dd0b910f8c1369e96d16269 /drivers/spi | |
parent | dda6241a1dc7fafd878e016acff9f1fb019c4f6e (diff) | |
download | u-boot-imx-191269987c3c9ee4943ffa29d078999362342966.zip u-boot-imx-191269987c3c9ee4943ffa29d078999362342966.tar.gz u-boot-imx-191269987c3c9ee4943ffa29d078999362342966.tar.bz2 |
spi: zynq_spi: Store cs value into private data
Store cs value into private data and use it while activating
chipselect instead of passing through function.
Signed-off-by: Jagan Teki <jteki@openedev.com>
Diffstat (limited to 'drivers/spi')
-rw-r--r-- | drivers/spi/zynq_spi.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/drivers/spi/zynq_spi.c b/drivers/spi/zynq_spi.c index 04d4b71..65a9633 100644 --- a/drivers/spi/zynq_spi.c +++ b/drivers/spi/zynq_spi.c @@ -65,6 +65,7 @@ struct zynq_spi_platdata { /* zynq spi priv */ struct zynq_spi_priv { struct zynq_spi_regs *regs; + u8 cs; u8 mode; u8 fifo_depth; u32 freq; /* required frequency */ @@ -132,7 +133,7 @@ static int zynq_spi_probe(struct udevice *bus) return 0; } -static void spi_cs_activate(struct udevice *dev, uint cs) +static void spi_cs_activate(struct udevice *dev) { struct udevice *bus = dev->parent; struct zynq_spi_priv *priv = dev_get_priv(bus); @@ -147,7 +148,7 @@ static void spi_cs_activate(struct udevice *dev, uint cs) * xx01 - cs1 * x011 - cs2 */ - cr |= (~(0x1 << cs) << ZYNQ_SPI_CR_SS_SHIFT) & ZYNQ_SPI_CR_CS_MASK; + cr |= (~(1 << priv->cs) << ZYNQ_SPI_CR_SS_SHIFT) & ZYNQ_SPI_CR_CS_MASK; writel(cr, ®s->cr); } @@ -203,8 +204,9 @@ static int zynq_spi_xfer(struct udevice *dev, unsigned int bitlen, return -1; } + priv->cs = slave_plat->cs; if (flags & SPI_XFER_BEGIN) - spi_cs_activate(dev, slave_plat->cs); + spi_cs_activate(dev); while (rx_len > 0) { /* Write the data into TX FIFO - tx threshold is fifo_depth */ |