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author | Sandor Yu <R01008@freescale.com> | 2014-07-04 17:13:58 +0800 |
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committer | Peng Fan <Peng.Fan@freescale.com> | 2015-04-29 14:42:39 +0800 |
commit | d6e803ed5f51d31ebe7e9d178aa11f16401b7fc8 (patch) | |
tree | 6b8b79d781e1d291c73862ed69675ef5d97551e1 /drivers/spi/tegra20_sflash.c | |
parent | 26af9318b5bdcde14e88c6d3d12e5a3c37d62143 (diff) | |
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ENGR00321299 gis: clean csi0 input mux set bit in GPR
When gis enable in uboot, the CSI0 input mux select setting
to vadc module, clean the bit when gis disabled.
Signed-off-by: Sandor Yu <R01008@freescale.com>
(cherry picked from commit ae66b17b7da3be50dc81ca636b67e8e879f52e26)
(cherry picked from commit c83fd326e810c2fff44b8b02e78406d5d04c977c)
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Diffstat (limited to 'drivers/spi/tegra20_sflash.c')
0 files changed, 0 insertions, 0 deletions