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authorajoy <akdas75@yahoo.in>2012-11-17 21:10:15 +0000
committerTom Rini <trini@ti.com>2012-12-10 08:55:25 -0700
commitcc1182beea3712c948dd91d3877cacbbdab3d6ae (patch)
treea9f9fe14e530889017a45ec9549dd5b6556841a8 /drivers/spi/omap3_spi.h
parent86021143a3081bd62d85abcc48135a0babc0096a (diff)
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OMAP3 SPI : Fixed bugs related to SPI transfer
Added posted writes (read after writes) to effect the change immediately for channel confiuration and channel enable register Disable the channel to purge receieve data in TX_ONLY mode transfer otherwise rx data will get affected by the next immediate RX_ONLY mode transfer Wait for the EOT bit to be set after last byte has been loaded to TX shift register in the the TX_ONLY mode.This ensures TX data has been completely shifted out Disable the channel in RX_ONLY mode before reading the last data from RXX register to prevent the SPI slave to transmit next word Signed-off-by: Ajoy Kumar Das <akdas75@yahoo.in> Cc: Tom Rini <trini@ti.com> Cc: jacopo mondi <j.mondi@voltaelectronics.com>
Diffstat (limited to 'drivers/spi/omap3_spi.h')
-rw-r--r--drivers/spi/omap3_spi.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/spi/omap3_spi.h b/drivers/spi/omap3_spi.h
index bffa43c..5e00208 100644
--- a/drivers/spi/omap3_spi.h
+++ b/drivers/spi/omap3_spi.h
@@ -99,6 +99,7 @@ struct mcspi {
#define OMAP3_MCSPI_CHSTAT_EOT (1 << 2)
#define OMAP3_MCSPI_CHCTRL_EN (1 << 0)
+#define OMAP3_MCSPI_CHCTRL_DIS (0 << 0)
#define OMAP3_MCSPI_WAKEUPENABLE_WKEN (1 << 0)