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| author | Michal Simek <michal.simek@xilinx.com> | 2016-12-12 09:47:26 +0100 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2017-01-10 10:18:11 +0100 |
| commit | b908fcad841a97025dd8c2a79bc53b15b386f292 (patch) | |
| tree | 865895642d955c4badf8477de85db154328e07d2 /drivers/net | |
| parent | 3cd42180a8f691c68d88b9ef428054348c2f0432 (diff) | |
| download | u-boot-imx-b908fcad841a97025dd8c2a79bc53b15b386f292.zip u-boot-imx-b908fcad841a97025dd8c2a79bc53b15b386f292.tar.gz u-boot-imx-b908fcad841a97025dd8c2a79bc53b15b386f292.tar.bz2 | |
net: gem: Use wait_for_bit() instead of private mdio_wait()
Using generic wait_for_bit() implementation instead of
using private wait function.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'drivers/net')
| -rw-r--r-- | drivers/net/zynq_gem.c | 32 |
1 files changed, 9 insertions, 23 deletions
diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index d2e5e7c..95b4d6e 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -183,33 +183,17 @@ struct zynq_gem_priv { struct mii_dev *bus; }; -static inline int mdio_wait(struct zynq_gem_regs *regs) -{ - u32 timeout = 20000; - - /* Wait till MDIO interface is ready to accept a new transaction. */ - while (--timeout) { - if (readl(®s->nwsr) & ZYNQ_GEM_NWSR_MDIOIDLE_MASK) - break; - WATCHDOG_RESET(); - } - - if (!timeout) { - printf("%s: Timeout\n", __func__); - return 1; - } - - return 0; -} - static u32 phy_setup_op(struct zynq_gem_priv *priv, u32 phy_addr, u32 regnum, u32 op, u16 *data) { u32 mgtcr; struct zynq_gem_regs *regs = priv->iobase; + int err; - if (mdio_wait(regs)) - return 1; + err = wait_for_bit(__func__, ®s->nwsr, ZYNQ_GEM_NWSR_MDIOIDLE_MASK, + true, 20000, true); + if (err) + return err; /* Construct mgtcr mask for the operation */ mgtcr = ZYNQ_GEM_PHYMNTNC_OP_MASK | op | @@ -219,8 +203,10 @@ static u32 phy_setup_op(struct zynq_gem_priv *priv, u32 phy_addr, u32 regnum, /* Write mgtcr and wait for completion */ writel(mgtcr, ®s->phymntnc); - if (mdio_wait(regs)) - return 1; + err = wait_for_bit(__func__, ®s->nwsr, ZYNQ_GEM_NWSR_MDIOIDLE_MASK, + true, 20000, true); + if (err) + return err; if (op == ZYNQ_GEM_PHYMNTNC_OP_R_MASK) *data = readl(®s->phymntnc); |