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authorRemy Bohmer <linux@bohmer.net>2008-06-03 15:26:23 +0200
committerBen Warren <biggerbadderben@gmail.com>2008-06-04 23:47:31 -0700
commitacba31847fad9ae40708cc2c9f3a634ec35f3416 (patch)
tree7e7347b5f3cc22fcd23dd364bd625da7378418aa /drivers/net/dm9000x.c
parent134e266253c02a7832560da59d394989c4f64453 (diff)
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DM9000: improve eth_send() routine
The eth_send routine of the U-boot DM9000x driver does not match the DM9000 or DM9000A application notes/programming guides. This change improves the stability of the DM9000A network controller. This change has been tested with DM9000A, DM9000E, DM9000EP. Signed-off-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Diffstat (limited to 'drivers/net/dm9000x.c')
-rw-r--r--drivers/net/dm9000x.c15
1 files changed, 11 insertions, 4 deletions
diff --git a/drivers/net/dm9000x.c b/drivers/net/dm9000x.c
index 05d07f3..c6c24dd 100644
--- a/drivers/net/dm9000x.c
+++ b/drivers/net/dm9000x.c
@@ -42,6 +42,9 @@ v1.2 03/18/2003 Weilun Huang <weilun_huang@davicom.com.tw>:
06/03/2008 Remy Bohmer <linux@bohmer.net>
- Added autodetect of databus width.
- Made debug code compile again.
+ - Adapt eth_send such that it matches the DM9000*
+ application notes. Needed to make it work properly
+ for DM9000A.
These changes are tested with DM9000{A,EP,E} together
with a 200MHz Atmel AT91SAM92161 core
@@ -505,15 +508,16 @@ int
eth_send(volatile void *packet, int length)
{
char *data_ptr;
- u32 tmplen, i;
int tmo;
struct board_info *db = &dm9000_info;
DM9000_DMP_PACKET("eth_send", packet, length);
+ DM9000_iow(DM9000_ISR, IMR_PTM); /* Clear Tx bit in ISR */
+
/* Move data to DM9000 TX RAM */
data_ptr = (char *) packet;
- DM9000_outb(DM9000_MWCMD, DM9000_IO);
+ DM9000_outb(DM9000_MWCMD, DM9000_IO); /* Prepare for TX-data */
/* push the data to the TX-fifo */
(db->outblk)(data_ptr, length);
@@ -523,16 +527,19 @@ eth_send(volatile void *packet, int length)
DM9000_iow(DM9000_TXPLH, (length >> 8) & 0xff);
/* Issue TX polling command */
- DM9000_iow(DM9000_TCR, TCR_TXREQ); /* Cleared after TX complete */
+ DM9000_iow(DM9000_TCR, TCR_TXREQ); /* Cleared after TX complete */
/* wait for end of transmission */
tmo = get_timer(0) + 5 * CFG_HZ;
- while (DM9000_ior(DM9000_TCR) & TCR_TXREQ) {
+ while ( !(DM9000_ior(DM9000_NSR) & (NSR_TX1END | NSR_TX2END)) ||
+ !(DM9000_ior(DM9000_ISR) & IMR_PTM) ) {
if (get_timer(0) >= tmo) {
printf("transmission timeout\n");
break;
}
}
+ DM9000_iow(DM9000_ISR, IMR_PTM); /* Clear Tx bit in ISR */
+
DM9000_DBG("transmit done\n\n");
return 0;
}