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authorLily Zhang <r58066@freescale.com>2010-10-14 16:42:19 +0800
committerLily Zhang <r58066@freescale.com>2010-10-17 18:04:52 +0800
commit9bbe28258c19c28f8f85c22c932bd119368cfacb (patch)
tree22fe342bd0594f37082c3d5aada765162773b5cc /drivers/mtd
parentd63c74683ab6063e0ca363bebe4f1f4b8197be33 (diff)
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ENGR00132617 MX53: add NAND support
Add NAND support for MX53 EVK and ARD. Need to use kobs-ng to flash U-Boot on MX53 TO1. Because MX51 TO1 ROM doesn't support bi swap solution and kernel enable bi swap, Must enable "ignore bad block" option when flashing U-Boot. The step is as following: echo 1 > /sys/devices/platform/mxc_nandv2_flash.0/ignorebad kobs-ng init --chip_0_device_path=/dev/mtd2 u-boot.bin echo 0 > /sys/devices/platform/mxc_nandv2_flash.0/ignorebad Since default configuration stores environment into SD card and U-Boot uses get_mmc_env_devno (Read SBMR register) to get MMC/SD slot information, you must insert SD card to bottom SD slot to get/store environment if you are using NAND boot on MX53 EVK. You must config boot dip setting well when doing NAND boot. For example, if you are using NAND 29F32G080AA NAND chip on MX53 EVK, you can set boot dips as the following for NAND boot: SW3: dip 7, 8 on; SW2: dip 3,5 on; SW1: dip 4,7,8 on. Other dips are off. Signed-off-by: Lily Zhang <r58066@freescale.com>
Diffstat (limited to 'drivers/mtd')
-rw-r--r--drivers/mtd/nand/mxc_nand.c15
-rw-r--r--drivers/mtd/nand/nand_device_info.c22
-rw-r--r--drivers/mtd/nand/nand_ids.c1
3 files changed, 29 insertions, 9 deletions
diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c
index ccb7af1..89d4556 100644
--- a/drivers/mtd/nand/mxc_nand.c
+++ b/drivers/mtd/nand/mxc_nand.c
@@ -280,12 +280,9 @@ static int mxc_nand_ecc_status(struct mtd_info *mtd)
u32 ecc_stat, err;
int no_subpages = 1;
int ret = 0;
- u8 ecc_bit_mask, err_limit;
struct nand_chip *this = mtd->priv;
struct nand_info *info = this->priv;
-
- ecc_bit_mask = (IS_4BIT_ECC ? 0x7 : 0xf);
- err_limit = (IS_4BIT_ECC ? 0x4 : 0x8);
+ u8 ecc_bit_mask = 0xf;
no_subpages = mtd->writesize >> 9;
@@ -294,7 +291,7 @@ static int mxc_nand_ecc_status(struct mtd_info *mtd)
ecc_stat = GET_NFC_ECC_STATUS();
do {
err = ecc_stat & ecc_bit_mask;
- if (err > err_limit) {
+ if (err == ecc_bit_mask) {
printk(KERN_WARNING "UnCorrectable RS-ECC Error\n");
return -1;
} else {
@@ -303,7 +300,7 @@ static int mxc_nand_ecc_status(struct mtd_info *mtd)
ecc_stat >>= 4;
} while (--no_subpages);
- MTDDEBUG(MTD_DEBUG_LEVEL3, "%d Symbol Correctable RS-ECC Error\n", ret);
+ MTDDEBUG(MTD_DEBUG_LEVEL3, "Correctable ECC Error(%d)\n", ret);
return ret;
}
@@ -1238,15 +1235,17 @@ static void mxc_nfc_init(void)
/* Unlock the internal RAM Buffer */
raw_write(NFC_SET_BLS(NFC_BLS_UNLCOKED), REG_NFC_BLS);
-
+#ifndef CONFIG_MX53
/* Blocks to be unlocked */
UNLOCK_ADDR(0x0, 0xFFFF);
/* Unlock Block Command for given address range */
raw_write(NFC_SET_WPC(NFC_WPC_UNLOCK), REG_NFC_WPC);
-
+#endif
/* Enable hw ecc */
raw_write((raw_read(REG_NFC_ECC_EN) | NFC_ECC_EN), REG_NFC_ECC_EN);
+ raw_write(raw_read(REG_NFC_ONE_CYCLE) |
+ NFC_ONE_CYCLE, REG_NFC_ONE_CYCLE);
}
static int mxc_alloc_buf(struct nand_info *info)
diff --git a/drivers/mtd/nand/nand_device_info.c b/drivers/mtd/nand/nand_device_info.c
index 2f3bbb6..c840672 100644
--- a/drivers/mtd/nand/nand_device_info.c
+++ b/drivers/mtd/nand/nand_device_info.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright (C) 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
@@ -496,6 +496,26 @@ static struct nand_device_info nand_device_info_table_type_2[] =
.tRHOH_in_ns = -1,
NULL,
},
+ {
+ .end_of_table = false,
+ .manufacturer_code = 0x2c,
+ .device_code = 0x48,
+ .cell_technology = NAND_DEVICE_CELL_TECH_SLC,
+ .chip_size_in_bytes = 2LL*SZ_1G,
+ .block_size_in_pages = 128,
+ /*
+ * TODO: The actual oob size for MT29F16G08ABACA is
+ * 224 bytes. Use oob 218 bytes since MX53 NFC controller
+ * mentions the spare area size must be less or equal 218
+ * byte if ECC is enabled
+ */
+ .page_total_size_in_bytes = 4*SZ_1K + 218,
+ .ecc_strength_in_bits = 8,
+ .ecc_size_in_bytes = 512,
+ .data_setup_in_ns = 15,
+ .data_hold_in_ns = 10,
+ .address_setup_in_ns = 20,
+ },
{true}
};
diff --git a/drivers/mtd/nand/nand_ids.c b/drivers/mtd/nand/nand_ids.c
index e4be857..2ffaf54 100644
--- a/drivers/mtd/nand/nand_ids.c
+++ b/drivers/mtd/nand/nand_ids.c
@@ -107,6 +107,7 @@ struct nand_flash_dev nand_flash_ids[] = {
{"NAND 2GiB 3,3V 8-bit", 0xD5, 0, 2048, 0, LP_OPTIONS},
{"NAND 2GiB 1,8V 16-bit", 0xB5, 0, 2048, 0, LP_OPTIONS16},
{"NAND 2GiB 3,3V 16-bit", 0xC5, 0, 2048, 0, LP_OPTIONS16},
+ {"NAND 2GiB 3,3V 8-bit", 0x48, 0, 2048, 0, LP_OPTIONS},
/* 32 Gigabit ,only use 2G due to the linux mtd limitation*/
{"NAND 4GiB 3,3V 8-bit", 0xD7, 0, 2048, 0, LP_OPTIONS},