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authorStefan Roese <sr@denx.de>2015-09-14 08:47:47 +0200
committerTom Rini <trini@konsulko.com>2015-09-15 15:05:21 -0400
commit62c390f8a3f0aabe61656d6996f1d49766de2c20 (patch)
treed084c121f3a4995abdc2f8c3ba942eff35b8bf22 /drivers/mtd
parent0226d8780b3886a4acdd2d4c9731419306d470f6 (diff)
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mtd: nand: fsmc: Fixes and cleanup for fsmc_nand_switch_ecc()
This patch addresses some comments raised by Scott in the last versions. Here the changes in detail: - Removed __maybe_unused as its not needed - Added check for strength == 4 and error out for the unsupported ECC strength values - Don't set .caclulate, .correct, and .bytes for NAND_ECC_SOFT_BCH as this will be done in nand_scan_tail() - Set .caclulate back to fsmc_read_hwecc() in the HW case - Added comment that this function will only be called on SPEAr platforms, not supporting the BCH8 HW ECC (FSMC_VER8) Signed-off-by: Stefan Roese <sr@denx.de> Cc: Scott Wood <scottwood@freescale.com> Cc: Tom Rini <trini@konsulko.com> Acked-by: Scott Wood <scottwood@freescale.com>
Diffstat (limited to 'drivers/mtd')
-rw-r--r--drivers/mtd/nand/fsmc_nand.c21
1 files changed, 15 insertions, 6 deletions
diff --git a/drivers/mtd/nand/fsmc_nand.c b/drivers/mtd/nand/fsmc_nand.c
index 0976a67..e0e9e1e 100644
--- a/drivers/mtd/nand/fsmc_nand.c
+++ b/drivers/mtd/nand/fsmc_nand.c
@@ -13,7 +13,6 @@
#include <asm/io.h>
#include <linux/bitops.h>
#include <linux/err.h>
-#include <linux/mtd/nand_bch.h>
#include <linux/mtd/nand_ecc.h>
#include <linux/mtd/fsmc_nand.h>
#include <asm/arch/hardware.h>
@@ -398,12 +397,18 @@ static int fsmc_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
* @eccstrength - the number of bits that could be corrected
* (1 - HW, 4 - SW BCH4)
*/
-int __maybe_unused fsmc_nand_switch_ecc(uint32_t eccstrength)
+int fsmc_nand_switch_ecc(uint32_t eccstrength)
{
struct nand_chip *nand;
struct mtd_info *mtd;
int err;
+ /*
+ * This functions is only called on SPEAr600 platforms, supporting
+ * 1 bit HW ECC. The BCH8 HW ECC (FSMC_VER8) from the ST-Ericsson
+ * Nomadik SoC is currently supporting this fsmc_nand_switch_ecc()
+ * function, as it doesn't need to switch to a different ECC layout.
+ */
mtd = &nand_info[nand_curr_device];
nand = mtd->priv;
@@ -413,14 +418,18 @@ int __maybe_unused fsmc_nand_switch_ecc(uint32_t eccstrength)
nand->ecc.bytes = 3;
nand->ecc.strength = 1;
nand->ecc.layout = &fsmc_ecc1_layout;
+ nand->ecc.calculate = fsmc_read_hwecc;
nand->ecc.correct = nand_correct_data;
- } else {
+ } else if (eccstrength == 4) {
+ /*
+ * .calculate .correct and .bytes will be set in
+ * nand_scan_tail()
+ */
nand->ecc.mode = NAND_ECC_SOFT_BCH;
- nand->ecc.calculate = nand_bch_calculate_ecc;
- nand->ecc.correct = nand_bch_correct_data;
- nand->ecc.bytes = 7;
nand->ecc.strength = 4;
nand->ecc.layout = NULL;
+ } else {
+ printf("Error: ECC strength %d not supported!\n", eccstrength);
}
/* Update NAND handling after ECC mode switch */