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authorHans de Goede <hdegoede@redhat.com>2015-08-15 11:59:25 +0200
committerHans de Goede <hdegoede@redhat.com>2015-08-31 08:43:41 +0200
commit5d65c67bf10bc5a815023ac13a2689aee9956d92 (patch)
treea11837662d5d00067d225e66e9ec2638eef8d71e /drivers/mtd
parent31c21471debbc9cec7466088da4fe2ee970d33b6 (diff)
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sunxi_nand_spl: Turn off clocks when we're done with the nand
Turn off the nand and dma clocks when we're done with the nand, this puts the nand and dma controllers back into a clean state for when the kernel boots. Without this the kernel will not boot properly when it is built with dma-controller support. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Diffstat (limited to 'drivers/mtd')
-rw-r--r--drivers/mtd/nand/sunxi_nand_spl.c17
1 files changed, 15 insertions, 2 deletions
diff --git a/drivers/mtd/nand/sunxi_nand_spl.c b/drivers/mtd/nand/sunxi_nand_spl.c
index 9efe904..147d476 100644
--- a/drivers/mtd/nand/sunxi_nand_spl.c
+++ b/drivers/mtd/nand/sunxi_nand_spl.c
@@ -5,9 +5,10 @@
* SPDX-License-Identifier: GPL-2.0+
*/
+#include <asm/arch/clock.h>
+#include <asm/io.h>
#include <common.h>
#include <config.h>
-#include <asm/io.h>
#include <nand.h>
/* registers */
@@ -330,4 +331,16 @@ int nand_spl_load_image(uint32_t offs, unsigned int size, void *dest)
return ecc_errors ? -1 : 0;
}
-void nand_deselect(void) {}
+void nand_deselect(void)
+{
+ struct sunxi_ccm_reg *const ccm =
+ (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+
+ clrbits_le32(&ccm->ahb_gate0, (CLK_GATE_OPEN << AHB_GATE_OFFSET_NAND0));
+#ifdef CONFIG_MACH_SUN9I
+ clrbits_le32(&ccm->ahb_gate1, (1 << AHB_GATE_OFFSET_DMA));
+#else
+ clrbits_le32(&ccm->ahb_gate0, (1 << AHB_GATE_OFFSET_DMA));
+#endif
+ clrbits_le32(&ccm->nand0_clk_cfg, CCM_NAND_CTRL_ENABLE | AHB_DIV_1);
+}