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authorTerry Lv <r65388@freescale.com>2010-11-04 22:20:06 +0800
committerTerry Lv <r65388@freescale.com>2010-11-18 18:30:59 +0800
commit3a13770bd01f785ce7e587c398c47436b6fa703f (patch)
treeb2878101d171e3444525652783ad35ebc14cf2f2 /drivers/mtd/nand/gpmi_nfc_hal.c
parente8c198f66e017cd2adf8757ec7c5deee2766d2a4 (diff)
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ENGR00133124: Add nand support for mx50 rdp
Add nand support for mx50 rdp. Signed-off-by: Terry Lv <r65388@freescale.com>
Diffstat (limited to 'drivers/mtd/nand/gpmi_nfc_hal.c')
-rw-r--r--drivers/mtd/nand/gpmi_nfc_hal.c7
1 files changed, 0 insertions, 7 deletions
diff --git a/drivers/mtd/nand/gpmi_nfc_hal.c b/drivers/mtd/nand/gpmi_nfc_hal.c
index 23ce265..568e3c5 100644
--- a/drivers/mtd/nand/gpmi_nfc_hal.c
+++ b/drivers/mtd/nand/gpmi_nfc_hal.c
@@ -918,13 +918,6 @@ static int send_command(struct mtd_info *mtd, unsigned chip,
MTDDEBUG(MTD_DEBUG_LEVEL2, "Chip: %d DMA Buf: 0x%08x Length: %d\n",
chip, buffer, length);
-#ifdef CONFIG_ARCH_MMU
- /* FIXME: I don't know why this delay is needed.
- * But with this delay, nand operations can be ok.
- */
- udelay(200);
-#endif
-
/* Compute the DMA channel. */
dma_channel = MXS_DMA_CHANNEL_AHB_APBH_GPMI0 + chip;