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authorPrabhakar Kushwaha <prabhakar@freescale.com>2014-06-14 08:48:19 +0530
committerYork Sun <yorksun@freescale.com>2014-07-22 16:25:54 -0700
commit591dd192307d81cf8f8705b06854e973c53d4c4d (patch)
tree38b6eb8c5b11734a57cee2a1a273073eb8aa0106 /drivers/mtd/nand/fsl_ifc_spl.c
parent32514d259bf37cc92872aeb0624b75f600e7fb3a (diff)
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driver/nand: Add support of 16K SRAM for IFC 2.0
Internal SRAM has been incresed from 8KB to 16KB for IFC cotroller ver 2.0. Update the page offset calculation logic to support the same. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'drivers/mtd/nand/fsl_ifc_spl.c')
-rw-r--r--drivers/mtd/nand/fsl_ifc_spl.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/mtd/nand/fsl_ifc_spl.c b/drivers/mtd/nand/fsl_ifc_spl.c
index 5100772..e336cb1 100644
--- a/drivers/mtd/nand/fsl_ifc_spl.c
+++ b/drivers/mtd/nand/fsl_ifc_spl.c
@@ -97,7 +97,7 @@ int nand_spl_load_image(uint32_t offs, unsigned int uboot_size, void *vdst)
int pages_per_blk;
int blk_size;
int bad_marker = 0;
- int bufnum_mask, bufnum;
+ int bufnum_mask, bufnum, ver = 0;
int csor, cspr;
int pos = 0;
@@ -130,6 +130,10 @@ int nand_spl_load_image(uint32_t offs, unsigned int uboot_size, void *vdst)
bad_marker = 5;
}
+ ver = ifc_in32(&ifc->ifc_rev);
+ if (ver >= FSL_IFC_V2_0_0)
+ bufnum_mask = (bufnum_mask * 2) + 1;
+
pages_per_blk =
32 << ((csor & CSOR_NAND_PB_MASK) >> CSOR_NAND_PB_SHIFT);