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authorWolfgang Denk <wd@denx.de>2011-10-28 00:15:19 +0200
committerWolfgang Denk <wd@denx.de>2011-10-28 00:15:19 +0200
commit87a5d601031652293ec4b729fdb7ee01bbd940a8 (patch)
tree91ede3ee45b228736c1876a700024782d7bc2032 /drivers/mmc
parent606a76f8ef479e42ae4d06f8f3ce87e9a1c72acf (diff)
parent37fc0ed268dc5acacd3a83adafa26eb1a84e90af (diff)
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Merge branch 'master' of git://git.denx.de/u-boot-arm
* 'master' of git://git.denx.de/u-boot-arm: ARM: Add Calxeda Highbank platform dkb: make mmc command as default enabled Marvell: dkb: add mmc support ARM: pantheon: add mmc definition davinci: remove config.mk file from the sources ARM:AM33XX: Add support for TI AM335X EVM ARM:AM33XX: Added timer support ARM:AM33XX: Add emif/ddr support ARM:AM33XX: Add clock definitions ARM:AM33XX: Added support for AM33xx omap3/emif4: fix registers definition davinci: remove obsolete macro CONFIG_EMAC_MDIO_PHY_NUM davinci: emac: add support for more than 1 PHYs davinci: emac: add new features to autonegotiate for EMAC da850evm: Move LPSC configuration to board_early_init_f() omap4_panda: Build in cmd_gpio support on panda omap: Don't use gpio_free to change direction to input mmc: omap: Allow OMAP_HSMMC[23]_BASE to be unset OMAP3: overo : Add environment variable optargs to bootargs OMAP3: overo: Move ethernet CS4 configuration to execute based on board id OMAP3: overo : Use ttyO2 instead of ttyS2. da830: add support for NAND boot mode dm36x: revert cache disable patch dm644X: revert cache disable patch devkit8000: Add malloc space omap: spl: fix build break due to changes in FAT OMAP3 SPL: Provide weak omap_rev_string omap: beagle: Use ubifs instead of jffs2 for nand boot omap: overo: Disable pull-ups on camera PCLK, HS and VS signals omap: overo: Configure mux for gpio10 SPL: Add DMA library omap3: Add interface for omap3 DMA omap3: Add DMA register accessors omap3: Add Base register for DMA arm, davinci: add missing LSPC define for MMC/SD1 U-Boot/SPL: omap4: Make ddr pre-calculated timings as default. DaVinci: correct MDSTAT.STATE mask omap4: splitting padconfs into common, 4430 and 4460 omap4: adding revision detection for 4460 ES1.1 omap4: replacing OMAP4_CONTROL with OMAP4430_CONTROL gplug: fixed build error as a result of code cleanup patch kirkwood_spi: add dummy spi_init() gpio: mvmfp: reduce include platform file ARM: orion5x: reduce dependence of including platform file serial: reduce include platform file for marvell chip ARM: kirkwood: reduce dependence of including platform file ARM: armada100: reduce dependence of including platform file ARM: pantheon: reduce dependence of including platform file Armada100: Add env storage support for Marvell gplugD Armada100: Add SPI flash support for Marvell gplugD Armada100: Add SPI support for Marvell gplugD SPI: Add SPI driver support for Marvell Armada100 dreamplug: initial board support. imx: fix coding style misc: pmic: drop old Freescale's pmic driver MX31: mx31pdk: use new pmic driver MX31: mx31ads: use new pmic driver MX31: mx31_litekit: use new pmic driver MX5: mx53evk: use new pmic driver MX5: mx51evk: use new pmic driver MX35: mx35pdk: use new pmic driver misc: pmic: addI2C support to pmic_fsl driver misc: pmic: use I2C_SET_BUS in pmic I2C MX5: efikamx/efikasb: use new pmic driver MX3: qong: use new pmic driver RTC: Switch mc13783 to generic pmic code MX5: vision2: use new pmic driver misc: pmic: Freescale PMIC switches to generic PMIC driver misc:pmic:samsung Enable PMIC driver at GONI target misc:pmic:max8998 MAX8998 support at a new PMIC driver. misc:pmic:core New generic PMIC driver mx31pdk: Remove unneeded config mx31: provide readable WEIM CS accessor MX51: vision2: Set global macros I2C: Add i2c_get/set_speed() to mxc_i2c.c ARM: Update mach-types devkit8000: Add config to enable SPL MMC boot devkit8000: protect board_mmc_init arm, post: add missing post_time_ms for arm cosmetic, post: Codingstyle cleanup arm, logbuffer: make it compileclean tegra2: Enable MMC for Seaboard tegra2: Add more pinmux functions tegra2: Rename PIN_ to PINGRP_ tegra2: Add more clock functions tegra2: Clean up board code a little tegra2: Rename CLOCK_PLL_ID to CLOCK_ID
Diffstat (limited to 'drivers/mmc')
-rw-r--r--drivers/mmc/omap_hsmmc.c4
-rw-r--r--drivers/mmc/tegra2_mmc.c94
-rw-r--r--drivers/mmc/tegra2_mmc.h1
3 files changed, 37 insertions, 62 deletions
diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c
index 5d4cf51..ebda980 100644
--- a/drivers/mmc/omap_hsmmc.c
+++ b/drivers/mmc/omap_hsmmc.c
@@ -475,12 +475,16 @@ int omap_mmc_init(int dev_index)
case 0:
mmc->priv = (hsmmc_t *)OMAP_HSMMC1_BASE;
break;
+#ifdef OMAP_HSMMC2_BASE
case 1:
mmc->priv = (hsmmc_t *)OMAP_HSMMC2_BASE;
break;
+#endif
+#ifdef OMAP_HSMMC3_BASE
case 2:
mmc->priv = (hsmmc_t *)OMAP_HSMMC3_BASE;
break;
+#endif
default:
mmc->priv = (hsmmc_t *)OMAP_HSMMC1_BASE;
return 1;
diff --git a/drivers/mmc/tegra2_mmc.c b/drivers/mmc/tegra2_mmc.c
index 8b6f829..9e741f2 100644
--- a/drivers/mmc/tegra2_mmc.c
+++ b/drivers/mmc/tegra2_mmc.c
@@ -23,36 +23,46 @@
#include <mmc.h>
#include <asm/io.h>
#include <asm/arch/clk_rst.h>
+#include <asm/arch/clock.h>
#include "tegra2_mmc.h"
/* support 4 mmc hosts */
struct mmc mmc_dev[4];
struct mmc_host mmc_host[4];
-static inline struct tegra2_mmc *tegra2_get_base_mmc(int dev_index)
+
+/**
+ * Get the host address and peripheral ID for a device. Devices are numbered
+ * from 0 to 3.
+ *
+ * @param host Structure to fill in (base, reg, mmc_id)
+ * @param dev_index Device index (0-3)
+ */
+static void tegra2_get_setup(struct mmc_host *host, int dev_index)
{
- unsigned long offset;
debug("tegra2_get_base_mmc: dev_index = %d\n", dev_index);
switch (dev_index) {
- case 0:
- offset = TEGRA2_SDMMC4_BASE;
- break;
case 1:
- offset = TEGRA2_SDMMC3_BASE;
+ host->base = TEGRA2_SDMMC3_BASE;
+ host->mmc_id = PERIPH_ID_SDMMC3;
break;
case 2:
- offset = TEGRA2_SDMMC2_BASE;
+ host->base = TEGRA2_SDMMC2_BASE;
+ host->mmc_id = PERIPH_ID_SDMMC2;
break;
case 3:
- offset = TEGRA2_SDMMC1_BASE;
+ host->base = TEGRA2_SDMMC1_BASE;
+ host->mmc_id = PERIPH_ID_SDMMC1;
break;
+ case 0:
default:
- offset = TEGRA2_SDMMC4_BASE;
+ host->base = TEGRA2_SDMMC4_BASE;
+ host->mmc_id = PERIPH_ID_SDMMC4;
break;
}
- return (struct tegra2_mmc *)(offset);
+ host->reg = (struct tegra2_mmc *)host->base;
}
static void mmc_prepare_data(struct mmc_host *host, struct mmc_data *data)
@@ -274,62 +284,24 @@ static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
static void mmc_change_clock(struct mmc_host *host, uint clock)
{
- int div, hw_div;
+ int div;
unsigned short clk;
unsigned long timeout;
- unsigned int reg, hostbase;
- struct clk_rst_ctlr *clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE;
+
debug(" mmc_change_clock called\n");
- /* Change Tegra2 SDMMCx clock divisor here */
- /* Source is 216MHz, PLLP_OUT0 */
+ /*
+ * Change Tegra2 SDMMCx clock divisor here. Source is 216MHz,
+ * PLLP_OUT0
+ */
if (clock == 0)
goto out;
-
- div = 1;
- if (clock <= 400000) {
- hw_div = ((9-1)<<1); /* Best match is 375KHz */
- div = 64;
- } else if (clock <= 20000000)
- hw_div = ((11-1)<<1); /* Best match is 19.6MHz */
- else if (clock <= 26000000)
- hw_div = ((9-1)<<1); /* Use 24MHz */
- else
- hw_div = ((4-1)<<1) + 1; /* 4.5 divisor for 48MHz */
-
- debug("mmc_change_clock: hw_div = %d, card clock div = %d\n",
- hw_div, div);
-
- /* Change SDMMCx divisor */
-
- hostbase = readl(&host->base);
- debug("mmc_change_clock: hostbase = %08X\n", hostbase);
-
- if (hostbase == TEGRA2_SDMMC1_BASE) {
- reg = readl(&clkrst->crc_clk_src_sdmmc1);
- reg &= 0xFFFFFF00; /* divisor (7.1) = 00 */
- reg |= hw_div; /* n-1 */
- writel(reg, &clkrst->crc_clk_src_sdmmc1);
- } else if (hostbase == TEGRA2_SDMMC2_BASE) {
- reg = readl(&clkrst->crc_clk_src_sdmmc2);
- reg &= 0xFFFFFF00; /* divisor (7.1) = 00 */
- reg |= hw_div; /* n-1 */
- writel(reg, &clkrst->crc_clk_src_sdmmc2);
- } else if (hostbase == TEGRA2_SDMMC3_BASE) {
- reg = readl(&clkrst->crc_clk_src_sdmmc3);
- reg &= 0xFFFFFF00; /* divisor (7.1) = 00 */
- reg |= hw_div; /* n-1 */
- writel(reg, &clkrst->crc_clk_src_sdmmc3);
- } else {
- reg = readl(&clkrst->crc_clk_src_sdmmc4);
- reg &= 0xFFFFFF00; /* divisor (7.1) = 00 */
- reg |= hw_div; /* n-1 */
- writel(reg, &clkrst->crc_clk_src_sdmmc4);
- }
+ clock_adjust_periph_pll_div(host->mmc_id, CLOCK_ID_PERIPH, clock,
+ &div);
+ debug("div = %d\n", div);
writew(0, &host->reg->clkcon);
- div >>= 1;
/*
* CLKCON
* SELFREQ[15:8] : base clock divided by value
@@ -337,6 +309,7 @@ static void mmc_change_clock(struct mmc_host *host, uint clock)
* STBLINTCLK[1] : Internal Clock Stable
* ENINTCLK[0] : Internal Clock Enable
*/
+ div >>= 1;
clk = (div << 8) | (1 << 0);
writew(clk, &host->reg->clkcon);
@@ -355,7 +328,6 @@ static void mmc_change_clock(struct mmc_host *host, uint clock)
writew(clk, &host->reg->clkcon);
debug("mmc_change_clock: clkcon = %08X\n", clk);
- debug("mmc_change_clock: CLK_SOURCE_SDMMCx = %08X\n", reg);
out:
host->clock = clock;
@@ -370,7 +342,6 @@ static void mmc_set_ios(struct mmc *mmc)
debug("bus_width: %x, clock: %d\n", mmc->bus_width, mmc->clock);
/* Change clock first */
-
mmc_change_clock(host, mmc->clock);
ctrl = readb(&host->reg->hostctl);
@@ -481,7 +452,7 @@ static int tegra2_mmc_initialize(int dev_index, int bus_width)
mmc->host_caps = MMC_MODE_8BIT;
else
mmc->host_caps = MMC_MODE_4BIT;
- mmc->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
+ mmc->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS | MMC_MODE_HC;
/*
* min freq is for card identification, and is the highest
@@ -495,8 +466,7 @@ static int tegra2_mmc_initialize(int dev_index, int bus_width)
mmc->f_max = 48000000;
mmc_host[dev_index].clock = 0;
- mmc_host[dev_index].reg = tegra2_get_base_mmc(dev_index);
- mmc_host[dev_index].base = (unsigned int)mmc_host[dev_index].reg;
+ tegra2_get_setup(&mmc_host[dev_index], dev_index);
mmc_register(mmc);
return 0;
diff --git a/drivers/mmc/tegra2_mmc.h b/drivers/mmc/tegra2_mmc.h
index 4b80f9f..28698e0 100644
--- a/drivers/mmc/tegra2_mmc.h
+++ b/drivers/mmc/tegra2_mmc.h
@@ -73,6 +73,7 @@ struct mmc_host {
unsigned int version; /* SDHCI spec. version */
unsigned int clock; /* Current clock (MHz) */
unsigned int base; /* Base address, SDMMC1/2/3/4 */
+ enum periph_id mmc_id; /* Peripheral ID: PERIPH_ID_... */
};
int tegra2_mmc_init(int dev_index, int bus_width);