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authorƁukasz Majewski <l.majewski@samsung.com>2012-11-13 03:21:53 +0000
committerAnatolij Gustschin <agust@denx.de>2012-11-14 11:21:07 +0100
commit86879d7120ab4000d924b12315c01d57506af832 (patch)
tree15eaff3cf40bbebbde4914d88c3890a6530b48ba /drivers/misc
parentb5bf9cafea246a6572c122bb3971cb48f50fc9ce (diff)
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pmic:i2c: Add I2C sensor byte order (big/little) to PMIC framework
Since the pmic_reg_read is the u32 value, the order in which bytes are placed to form u32 value is important. Support for big and little sensor endianess is added. Moreover calls to [leXX|beXX]_to_cpu have been added to support little and big endian SoCs. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Diffstat (limited to 'drivers/misc')
-rw-r--r--drivers/misc/pmic_i2c.c38
1 files changed, 29 insertions, 9 deletions
diff --git a/drivers/misc/pmic_i2c.c b/drivers/misc/pmic_i2c.c
index e74c372..1064bfe 100644
--- a/drivers/misc/pmic_i2c.c
+++ b/drivers/misc/pmic_i2c.c
@@ -30,6 +30,7 @@
#include <linux/types.h>
#include <pmic.h>
#include <i2c.h>
+#include <compiler.h>
int pmic_reg_write(struct pmic *p, u32 reg, u32 val)
{
@@ -40,16 +41,27 @@ int pmic_reg_write(struct pmic *p, u32 reg, u32 val)
switch (pmic_i2c_tx_num) {
case 3:
- buf[0] = (val >> 16) & 0xff;
- buf[1] = (val >> 8) & 0xff;
- buf[2] = val & 0xff;
+ if (p->sensor_byte_order == PMIC_SENSOR_BYTE_ORDER_BIG) {
+ buf[2] = (cpu_to_le32(val) >> 16) & 0xff;
+ buf[1] = (cpu_to_le32(val) >> 8) & 0xff;
+ buf[0] = cpu_to_le32(val) & 0xff;
+ } else {
+ buf[0] = (cpu_to_le32(val) >> 16) & 0xff;
+ buf[1] = (cpu_to_le32(val) >> 8) & 0xff;
+ buf[2] = cpu_to_le32(val) & 0xff;
+ }
break;
case 2:
- buf[0] = (val >> 8) & 0xff;
- buf[1] = val & 0xff;
+ if (p->sensor_byte_order == PMIC_SENSOR_BYTE_ORDER_BIG) {
+ buf[1] = (cpu_to_le32(val) >> 8) & 0xff;
+ buf[0] = cpu_to_le32(val) & 0xff;
+ } else {
+ buf[0] = (cpu_to_le32(val) >> 8) & 0xff;
+ buf[1] = cpu_to_le32(val) & 0xff;
+ }
break;
case 1:
- buf[0] = val & 0xff;
+ buf[0] = cpu_to_le32(val) & 0xff;
break;
default:
printf("%s: invalid tx_num: %d", __func__, pmic_i2c_tx_num);
@@ -75,13 +87,21 @@ int pmic_reg_read(struct pmic *p, u32 reg, u32 *val)
switch (pmic_i2c_tx_num) {
case 3:
- ret_val = buf[0] << 16 | buf[1] << 8 | buf[2];
+ if (p->sensor_byte_order == PMIC_SENSOR_BYTE_ORDER_BIG)
+ ret_val = le32_to_cpu(buf[2] << 16
+ | buf[1] << 8 | buf[0]);
+ else
+ ret_val = le32_to_cpu(buf[0] << 16 |
+ buf[1] << 8 | buf[2]);
break;
case 2:
- ret_val = buf[0] << 8 | buf[1];
+ if (p->sensor_byte_order == PMIC_SENSOR_BYTE_ORDER_BIG)
+ ret_val = le32_to_cpu(buf[1] << 8 | buf[0]);
+ else
+ ret_val = le32_to_cpu(buf[0] << 8 | buf[1]);
break;
case 1:
- ret_val = buf[0];
+ ret_val = le32_to_cpu(buf[0]);
break;
default:
printf("%s: invalid tx_num: %d", __func__, pmic_i2c_tx_num);