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authorWolfgang Denk <wd@denx.de>2010-04-01 11:28:32 +0200
committerWolfgang Denk <wd@denx.de>2010-04-01 11:28:32 +0200
commitffa37fc98d71ef930bccd4e9eed37f6ce6b4d6af (patch)
tree206908754219b5cc6e9f03518d34fb95a247bef9 /drivers/input
parentca6e1c136ddb720c3bb2cc043b99f7f06bc46c55 (diff)
parentfd03ea89641d6f6ade6d1a8580c1bb9f52b8542c (diff)
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Merge branch 'next'
Diffstat (limited to 'drivers/input')
-rw-r--r--drivers/input/ps2ser.c11
1 files changed, 0 insertions, 11 deletions
diff --git a/drivers/input/ps2ser.c b/drivers/input/ps2ser.c
index 1b20a76..8d0b6d6 100644
--- a/drivers/input/ps2ser.c
+++ b/drivers/input/ps2ser.c
@@ -36,8 +36,6 @@ DECLARE_GLOBAL_DATA_PTR;
#define PSC_BASE MPC5XXX_PSC2
#elif CONFIG_PS2SERIAL == 3
#define PSC_BASE MPC5XXX_PSC3
-#elif defined(CONFIG_MGT5100)
-#error CONFIG_PS2SERIAL must be in 1, 2 or 3
#elif CONFIG_PS2SERIAL == 4
#define PSC_BASE MPC5XXX_PSC4
#elif CONFIG_PS2SERIAL == 5
@@ -87,23 +85,14 @@ int ps2ser_init(void)
psc->command = PSC_SEL_MODE_REG_1;
/* select clock sources */
-#if defined(CONFIG_MGT5100)
- psc->psc_clock_select = 0xdd00;
- baseclk = (CONFIG_SYS_MPC5XXX_CLKIN + 16) / 32;
-#elif defined(CONFIG_MPC5200)
psc->psc_clock_select = 0;
baseclk = (gd->ipb_clk + 16) / 32;
-#endif
/* switch to UART mode */
psc->sicr = 0;
/* configure parity, bit length and so on */
-#if defined(CONFIG_MGT5100)
- psc->mode = PSC_MODE_ERR | PSC_MODE_8_BITS | PSC_MODE_PARNONE;
-#elif defined(CONFIG_MPC5200)
psc->mode = PSC_MODE_8_BITS | PSC_MODE_PARNONE;
-#endif
psc->mode = PSC_MODE_ONE_STOP;
/* set up UART divisor */