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authorEnric Balletbo i Serra <enric.balletbo@collabora.com>2016-05-03 08:59:24 +0200
committerTom Rini <trini@konsulko.com>2016-05-03 12:17:13 -0400
commite7fbcbc2566ab4bbcb07889a5791972ac49fa407 (patch)
tree7ad331a83b49e2ea694073d79052389fc7b172ef /drivers/fpga/spartan3.c
parent8edeac86db306482b9bcb860d572320a8c3ed95d (diff)
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igep00x0: Use the SRAM available for SPL.
Move CONFIG_SPL_TEXT_BASE down to 0x40200000 and set CONFIG_SPL_MAX_SIZE to (SRAM_SCRATCH_SPACE_ADDR - CONFIG_SPL_TEXT_BASE), so that it's clear what the limit is. This will also help some compilers to fit all the code into the allocated space. Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Diffstat (limited to 'drivers/fpga/spartan3.c')
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