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authorStefan Roese <sr@denx.de>2015-08-06 14:43:13 +0200
committerLuka Perkov <luka.perkov@sartura.hr>2015-08-17 18:49:33 +0200
commit0ceb2dae788848ad6df9fb1cc0e20e632f380887 (patch)
tree0c760046fefc20f5c17e721e6906d52a7be9d9f2 /drivers/ddr
parenta8b57a90ec65832ca069ed1b0900cf92e9efd6a0 (diff)
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arm: mvebu: Add complete SDRAM ECC scrubbing
This patch introduces the SDRAM scrubbing for ECC enabled board to fill/initialize the ECC bytes. This is done via the XOR engine to speed up the process. The scrubbing is a 2-stage process: 1) SPL scrubs the area 0 - 0x100.0000 (16MiB) for the main U-Boot 2) U-Boot scrubs the remaining SDRAM area(s) Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
Diffstat (limited to 'drivers/ddr')
-rw-r--r--drivers/ddr/marvell/axp/xor.c3
-rw-r--r--drivers/ddr/marvell/axp/xor.h1
2 files changed, 2 insertions, 2 deletions
diff --git a/drivers/ddr/marvell/axp/xor.c b/drivers/ddr/marvell/axp/xor.c
index 66c96ae..54924ca 100644
--- a/drivers/ddr/marvell/axp/xor.c
+++ b/drivers/ddr/marvell/axp/xor.c
@@ -18,7 +18,6 @@ static u32 xor_regs_ctrl_backup;
static u32 xor_regs_base_backup[MAX_CS];
static u32 xor_regs_mask_backup[MAX_CS];
-static void mv_xor_hal_init(u32 chan_num);
static int mv_xor_cmd_set(u32 chan, int command);
static int mv_xor_ctrl_set(u32 chan, u32 xor_ctrl);
@@ -110,7 +109,7 @@ void mv_sys_xor_finish(void)
* RETURN:
* MV_BAD_PARAM if parameters to function invalid, MV_OK otherwise.
*/
-static void mv_xor_hal_init(u32 chan_num)
+void mv_xor_hal_init(u32 chan_num)
{
u32 i;
diff --git a/drivers/ddr/marvell/axp/xor.h b/drivers/ddr/marvell/axp/xor.h
index 3536487..3ff784d 100644
--- a/drivers/ddr/marvell/axp/xor.h
+++ b/drivers/ddr/marvell/axp/xor.h
@@ -60,6 +60,7 @@ struct crc_dma_desc {
u32 src_addr1; /* Mode: Source Block address pointer */
} __packed;
+void mv_xor_hal_init(u32 chan_num);
int mv_xor_state_get(u32 chan);
void mv_sys_xor_init(MV_DRAM_INFO *dram_info);
void mv_sys_xor_finish(void);