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| author | Tom Rini <trini@konsulko.com> | 2015-07-23 09:02:28 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2015-07-23 09:02:28 -0400 |
| commit | 3c9cc70d7153da442575112d9a2643eecd17d534 (patch) | |
| tree | b7f2abf20d86dfcb99e4a5406c3dd1b85c176b9f /drivers/ddr/marvell/a38x/ddr3_topology_def.h | |
| parent | 6b9f9eadffb5f64801746593784e12f07f2fadd0 (diff) | |
| parent | 9e30b31d20f0b793465d07f056b3d9885f578c0d (diff) | |
| download | u-boot-imx-3c9cc70d7153da442575112d9a2643eecd17d534.zip u-boot-imx-3c9cc70d7153da442575112d9a2643eecd17d534.tar.gz u-boot-imx-3c9cc70d7153da442575112d9a2643eecd17d534.tar.bz2 | |
Merge git://git.denx.de/u-boot-marvell
Diffstat (limited to 'drivers/ddr/marvell/a38x/ddr3_topology_def.h')
| -rw-r--r-- | drivers/ddr/marvell/a38x/ddr3_topology_def.h | 76 |
1 files changed, 76 insertions, 0 deletions
diff --git a/drivers/ddr/marvell/a38x/ddr3_topology_def.h b/drivers/ddr/marvell/a38x/ddr3_topology_def.h new file mode 100644 index 0000000..64a0447 --- /dev/null +++ b/drivers/ddr/marvell/a38x/ddr3_topology_def.h @@ -0,0 +1,76 @@ +/* + * Copyright (C) Marvell International Ltd. and its affiliates + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#ifndef _DDR3_TOPOLOGY_DEF_H +#define _DDR3_TOPOLOGY_DEF_H + +/* TOPOLOGY */ + +enum hws_speed_bin { + SPEED_BIN_DDR_800D, + SPEED_BIN_DDR_800E, + SPEED_BIN_DDR_1066E, + SPEED_BIN_DDR_1066F, + SPEED_BIN_DDR_1066G, + SPEED_BIN_DDR_1333F, + SPEED_BIN_DDR_1333G, + SPEED_BIN_DDR_1333H, + SPEED_BIN_DDR_1333J, + SPEED_BIN_DDR_1600G, + SPEED_BIN_DDR_1600H, + SPEED_BIN_DDR_1600J, + SPEED_BIN_DDR_1600K, + SPEED_BIN_DDR_1866J, + SPEED_BIN_DDR_1866K, + SPEED_BIN_DDR_1866L, + SPEED_BIN_DDR_1866M, + SPEED_BIN_DDR_2133K, + SPEED_BIN_DDR_2133L, + SPEED_BIN_DDR_2133M, + SPEED_BIN_DDR_2133N, + + SPEED_BIN_DDR_1333H_EXT, + SPEED_BIN_DDR_1600K_EXT, + SPEED_BIN_DDR_1866M_EXT +}; + +enum hws_ddr_freq { + DDR_FREQ_LOW_FREQ, + DDR_FREQ_400, + DDR_FREQ_533, + DDR_FREQ_667, + DDR_FREQ_800, + DDR_FREQ_933, + DDR_FREQ_1066, + DDR_FREQ_311, + DDR_FREQ_333, + DDR_FREQ_467, + DDR_FREQ_850, + DDR_FREQ_600, + DDR_FREQ_300, + DDR_FREQ_900, + DDR_FREQ_360, + DDR_FREQ_1000, + DDR_FREQ_LIMIT +}; + +enum speed_bin_table_elements { + SPEED_BIN_TRCD, + SPEED_BIN_TRP, + SPEED_BIN_TRAS, + SPEED_BIN_TRC, + SPEED_BIN_TRRD1K, + SPEED_BIN_TRRD2K, + SPEED_BIN_TPD, + SPEED_BIN_TFAW1K, + SPEED_BIN_TFAW2K, + SPEED_BIN_TWTR, + SPEED_BIN_TRTP, + SPEED_BIN_TWR, + SPEED_BIN_TMOD +}; + +#endif /* _DDR3_TOPOLOGY_DEF_H */ |