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| author | Stephen Warren <swarren@nvidia.com> | 2015-04-14 08:59:00 -0600 |
|---|---|---|
| committer | Scott Wood <scottwood@freescale.com> | 2015-05-21 14:24:36 -0500 |
| commit | 5e856fa8bec49b86e680626be772dd6b6aa3e5df (patch) | |
| tree | 636e2b09ec7c347869dbc1e39501add33deba55c /drivers/ddr/fsl/mpc86xx_ddr.c | |
| parent | 3238639d40732fe78fd62ae5e080465552e882fc (diff) | |
| download | u-boot-imx-5e856fa8bec49b86e680626be772dd6b6aa3e5df.zip u-boot-imx-5e856fa8bec49b86e680626be772dd6b6aa3e5df.tar.gz u-boot-imx-5e856fa8bec49b86e680626be772dd6b6aa3e5df.tar.bz2 | |
nand: fix buffer alignment in new verification feature
On systems with caches enabled, NAND I/O may need to flush/invalidate
the cache during read/write operations. For this to work correctly, all
buffers must be cache-aligned. Fix nand_verify*() to allocate aligned
buffers.
This prevents cache alignment warnings from being spewed when using
U-Boot to write an updated version of itself to flash on NVIDIA Tegra
Seaboard (after perturbation of stack/data layout in current
u-boot-dm/next branch).
I have validatd (executed) nand_verify(), but I don't think I've executed
nand_verify_page_oob(); testing of that would be useful.
Cc: Peter Tyser <ptyser@xes-inc.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Scott Wood <scottwood@freescale.com>
Fixes: 59b5a2ad83df ("nand: Add verification functions")
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Scott Wood <scottwood@freescale.com>
Diffstat (limited to 'drivers/ddr/fsl/mpc86xx_ddr.c')
0 files changed, 0 insertions, 0 deletions