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authorSimon Glass <sjg@chromium.org>2016-01-21 19:43:45 -0700
committerSimon Glass <sjg@chromium.org>2016-01-21 20:42:34 -0700
commit342999f9b3ce6c5c30b100549799e646e7fa70c5 (patch)
tree76d71f38d165d80f94321b7257f2f4440d98a74c /drivers/clk
parent6d97786b4c695b45056a00bac07124cac0a81204 (diff)
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rockchip: mmc: Update the driver to use the new clock ID
We can use the new clk_get_by_index() function to get the correct clock. Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'drivers/clk')
-rw-r--r--drivers/clk/clk_rk3288.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/clk_rk3288.c b/drivers/clk/clk_rk3288.c
index fdc5347..d294788 100644
--- a/drivers/clk/clk_rk3288.c
+++ b/drivers/clk/clk_rk3288.c
@@ -541,8 +541,8 @@ static ulong rk3288_get_periph_rate(struct udevice *dev, int periph)
gclk_rate = clk_get_rate(gclk);
switch (periph) {
case HCLK_EMMC:
+ case HCLK_SDMMC:
case HCLK_SDIO0:
- case HCLK_SDIO1:
new_rate = rockchip_mmc_get_clk(priv->cru, gclk_rate, periph);
break;
case SCLK_SPI0: