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author | Wenyou Yang <wenyou.yang@atmel.com> | 2016-07-20 17:55:12 +0800 |
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committer | Andreas Bießmann <andreas@biessmann.org> | 2016-08-15 22:12:00 +0200 |
commit | 9e5935c04e891abb38a92a893f3457cdf304ef4f (patch) | |
tree | 69230fbc19be7d58a5bfd974456bfd643bfd0d23 /drivers/clk/at91/clk-plla.c | |
parent | 03dcd410d70b7251ac82f78088123e23170591d4 (diff) | |
download | u-boot-imx-9e5935c04e891abb38a92a893f3457cdf304ef4f.zip u-boot-imx-9e5935c04e891abb38a92a893f3457cdf304ef4f.tar.gz u-boot-imx-9e5935c04e891abb38a92a893f3457cdf304ef4f.tar.bz2 |
clk: at91: Add clock driver
The patch is referred to at91 clock driver of Linux, to make
the clock node descriptions in DT aligned with the Linux's.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'drivers/clk/at91/clk-plla.c')
-rw-r--r-- | drivers/clk/at91/clk-plla.c | 55 |
1 files changed, 55 insertions, 0 deletions
diff --git a/drivers/clk/at91/clk-plla.c b/drivers/clk/at91/clk-plla.c new file mode 100644 index 0000000..2a71399 --- /dev/null +++ b/drivers/clk/at91/clk-plla.c @@ -0,0 +1,55 @@ +/* + * Copyright (C) 2016 Atmel Corporation + * Wenyou.Yang <wenyou.yang@atmel.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <clk-uclass.h> +#include <dm/device.h> +#include <linux/io.h> +#include <mach/at91_pmc.h> +#include "pmc.h" + +DECLARE_GLOBAL_DATA_PTR; + +static int plla_clk_enable(struct clk *clk) +{ + struct pmc_platdata *plat = dev_get_platdata(clk->dev); + struct at91_pmc *pmc = plat->reg_base; + + if (readl(&pmc->sr) & AT91_PMC_LOCKA) + return 0; + + return -EINVAL; +} + +static ulong plla_clk_get_rate(struct clk *clk) +{ + return gd->arch.plla_rate_hz; +} + +static struct clk_ops plla_clk_ops = { + .enable = plla_clk_enable, + .get_rate = plla_clk_get_rate, +}; + +static int plla_clk_probe(struct udevice *dev) +{ + return at91_pmc_core_probe(dev); +} + +static const struct udevice_id plla_clk_match[] = { + { .compatible = "atmel,sama5d3-clk-pll" }, + {} +}; + +U_BOOT_DRIVER(at91_plla_clk) = { + .name = "at91-plla-clk", + .id = UCLASS_CLK, + .of_match = plla_clk_match, + .probe = plla_clk_probe, + .platdata_auto_alloc_size = sizeof(struct pmc_platdata), + .ops = &plla_clk_ops, +}; |