Merge with git://www.denx.de/git/u-boot.git

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diff --git a/doc/README.marubun-pcmcia b/doc/README.marubun-pcmcia
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+
+U-Boot MARUBUN MR-SHPC-01 PCMCIA controller driver
+	Last update 21/11/2007 by Nobuhiro Iwamatsu
+
+========================================================================================
+
+0. What's this?
+    This driver supports MARUBUN MR-SHPC-01.
+	url: http://www.marubun.co.jp/product/semicon/devices/qgc18e0000002n2z.html
+	(Sorry Japanese only.)
+
+    This chip is used with SuperH well, and adopted by the
+    reference board.
+	ex. * MS7750SE01
+		* MS7722SE01
+		* other
+
+    This chip doesn't support CardBus.
+
+1. base source code
+    The code is based on sources from the Linux kernel
+    	( arch/sh/kernel/cf-enabler.c ).
+
+2. How to use
+    The options you have to specify in the config file are (with the
+    value for my board as an example):
+
+    * CONFIG_MARUBUN_PCCARD
+	If you want to use this device driver, should define CONFIG_MARUBUN_PCCARD.
+	ex. 	#define CONFIG_MARUBUN_PCCARD
+
+    * CONFIG_PCMCIA_SLOT_A
+    	Most devices have only one slot. You should define CONFIG_PCMCIA_SLOT_A .
+	ex.	#define CONFIG_PCMCIA_SLOT_A    1
+
+    * CFG_MARUBUN_MRSHPC
+    	This is MR-SHPC-01 PCMCIA controler base address.
+	You should do the setting matched to your environment.
+	ex.  #define CFG_MARUBUN_MRSHPC 0xb03fffe0
+	     ( for MS7722SE01 environment )
+
+    * CFG_MARUBUN_MW1
+	This is MR-SHPC-01 memory window base address.
+	You should do the setting matched to your environment.
+	ex. #define CFG_MARUBUN_MW1 0xb0400000
+	     ( for MS7722SE01 environment )
+
+    * CFG_MARUBUN_MW1
+	This is MR-SHPC-01 attribute window base address.
+	You should do the setting matched to your environment.
+	ex. #define CFG_MARUBUN_MW2 0xb0500000
+	     ( for MS7722SE01 environment )
+
+    * CFG_MARUBUN_MW1
+	This is MR-SHPC-01 I/O window base address.
+	You should do the setting matched to your environment.
+	ex. #define CFG_MARUBUN_IO  0xb0600000
+	     ( for MS7722SE01 environment )
+
+3. Other
+    * Check Compact Flash only.
+    * Maybe, NE2000 compatible NIC is sure to move.
+
+Copyright (c) 2007
+	Nobuhiro Iwamatsu <iwamatsu@nigaur.org>
diff --git a/doc/README.mpc8610hpcd b/doc/README.mpc8610hpcd
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+Freescale MPC8610HPCD board
+===========================
+
+
+Building U-Boot
+---------------
+
+    $ make MPC8610HPCD_config
+    Configuring for MPC8610HPCD board...
+
+    $ make
+
+
+Flashing U-Boot
+---------------
+The flash is 128M starting at 0xF800_0000.
+
+The alternate image is at 0xFBF0_0000
+The      boot image is at 0xFFF0_0000.
+
+
+To Flash U-Boot into the booting bank:
+
+	tftp 1000000 u-boot.bin
+	protect off all
+	erase fff00000 +$filesize
+	cp.b 1000000 fff00000 $filesize
+
+
+To Flash U-boot into the alternate bank
+
+	tftp 1000000 u-boot.bin
+	erase fbf00000 +$filesize
+	cp.b 1000000 fbf00000 $filesize
+
+
+pixis_reset command
+-------------------
+A new command, "pixis_reset", is introduced to reset mpc8610hpcd board
+using the FPGA sequencer.  When the board restarts, it has the option
+of using either the current or alternate flash bank as the boot
+image, with or without the watchdog timer enabled, and finally with
+or without frequency changes.
+
+Usage is;
+
+	pixis_reset
+	pixis_reset altbank
+	pixis_reset altbank wd
+	pixis_reset altbank cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio>
+	pixis_reset cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio>
+
+Examples;
+
+	/* reset to current bank, like "reset" command */
+	pixis_reset
+
+	/* reset board but use the to alternate flash bank */
+	pixis_reset altbank
+
+	/* reset board, use alternate flash bank with watchdog timer enabled*/
+	pixis_reset altbank wd
+
+	/* reset board to alternate bank with frequency changed.
+	 * 40 is SYSCLK, 2.5 is COREPLL ratio, 10 is MPXPLL ratio
+	 */
+	pixis-reset altbank cf 40 2.5 10
diff --git a/doc/README.sh b/doc/README.sh
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+++ b/doc/README.sh
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+
+U-Boot for Renesas SuperH
+	Last update 08/10/2007 by Nobuhiro Iwamatsu
+
+================================================================================
+0. What's this?
+	This file contains status information for the port of U-Boot to the
+	Renesas SuperH series of CPUs.
+
+================================================================================
+1. Overview
+	SuperH has an original boot loader. However, source code is dirty, and
+	maintenance is not done.
+	To improve sharing and the maintenance of the code, Nobuhiro Iwamatsu
+	started the porting to u-boot in 2007.
+
+================================================================================
+2. Supported CPUs
+
+	2.1. Renesas SH7750/SH7750R
+	2.2. Renesas SH7722
+
+================================================================================
+3. Supported Boards
+
+	3.1. Hitachi UL MS7750SE01/MS7750RSE01
+		Board specific code is in board/ms7750se
+		To use this board, type "make ms7750se_config".
+
+	3.2. Hitachi UL MS7722SE01
+		Board specific code is in board/ms7722se
+		To use this board, type "make ms7722se_config".
+
+	** README **
+		In SuperH, S-record and binary of made u-boot work on the memory.
+		When u-boot is written in the flash, it is necessary to change the
+		address by using 'objcopy'.
+		ex) shX-linux-objcopy -Ibinary -Osrec u-boot.bin u-boot.flash.srec
+
+================================================================================
+4. Compiler
+	You can use the following of u-boot to compile.
+		- SuperH Linux Open site
+			http://www.superh-linux.org/
+		- KPIT GNU tools
+			http://www.kpitgnutools.com/
+
+================================================================================
+5. Future
+	I plan to support the following CPUs and boards.
+		5.1. CPUs
+			- SH7710/SH7712 (SH3)
+			- SH7780(SH4)
+			- SH7785(SH4)
+
+		5.2. Boards
+			- Many boards ;-)
+
+================================================================================
+Copyright (c) 2007
+    Nobuhiro Iwamatsu <iwamatsu@nigaur.org>