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| author | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2013-07-25 17:57:46 +0200 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2013-07-25 17:57:46 +0200 |
| commit | 8b485ba12b0defa0c4ed3559789250238f8331a8 (patch) | |
| tree | a1174810bef0d504370272918dca8d485ae2ae3b /doc/README.mips | |
| parent | 12607adcd5181a8f6eab885a5fe4ba2fa12ef92a (diff) | |
| parent | aaf5e825606a70ddc8fca8e366d8c16a6fd3cc7c (diff) | |
| download | u-boot-imx-8b485ba12b0defa0c4ed3559789250238f8331a8.zip u-boot-imx-8b485ba12b0defa0c4ed3559789250238f8331a8.tar.gz u-boot-imx-8b485ba12b0defa0c4ed3559789250238f8331a8.tar.bz2 | |
Merge branch 'u-boot/master' into u-boot-arm/master
Diffstat (limited to 'doc/README.mips')
| -rw-r--r-- | doc/README.mips | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/doc/README.mips b/doc/README.mips index f4f770b..b28f628 100644 --- a/doc/README.mips +++ b/doc/README.mips @@ -39,8 +39,6 @@ TODOs * Secondary cache support missing - * Centralize the link directive files - * Initialize TLB entries redardless of their use * R2000/R3000 class parts are not supported @@ -51,8 +49,6 @@ TODOs initialized in board specific assembler language before the cache init code is run -- that is, initialize the DRAM in lowlevel_init(). - * get rid of CONFIG_MANUAL_RELOC - * centralize/share more CPU code of MIPS32, MIPS64 and XBurst * support Qemu Malta |